Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm. Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling. IEEE Trans. VLSI Syst., 15(7):746-757, 2007. [doi]
@article{AziziKDN07,
title = {Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling},
author = {Navid Azizi and Muhammad M. Khellah and Vivek De and Farid N. Najm},
year = {2007},
doi = {10.1109/TVLSI.2007.899226},
url = {http://dx.doi.org/10.1109/TVLSI.2007.899226},
tags = {context-aware, design},
researchr = {https://researchr.org/publication/AziziKDN07},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {15},
number = {7},
pages = {746-757},
}