A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS

Woo-Rham Bae, Haram Ju, Kwanseo Park, Sung-Yong Cho, Deog Kyoon Jeong. A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xia'men, China, November 9-11, 2015. pages 1-4, IEEE, 2015. [doi]

@inproceedings{BaeJPCJ15,
  title = {A 7.6 mW, 214-fs RMS jitter 10-GHz phase-locked loop for 40-Gb/s serial link transmitter based on two-stage ring oscillator in 65-nm CMOS},
  author = {Woo-Rham Bae and Haram Ju and Kwanseo Park and Sung-Yong Cho and Deog Kyoon Jeong},
  year = {2015},
  doi = {10.1109/ASSCC.2015.7387448},
  url = {http://dx.doi.org/10.1109/ASSCC.2015.7387448},
  researchr = {https://researchr.org/publication/BaeJPCJ15},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xia'men, China, November 9-11, 2015},
  publisher = {IEEE},
  isbn = {978-1-4673-7191-9},
}