Exploiting clock skew scheduling for FPGA

Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijaykrishnan. Exploiting clock skew scheduling for FPGA. In Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009. pages 1524-1529, IEEE, 2009. [doi]

@inproceedings{BaeMV09,
  title = {Exploiting clock skew scheduling for FPGA},
  author = {Sungmin Bae and Prasanth Mangalagiri and Narayanan Vijaykrishnan},
  year = {2009},
  url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=5090609&arnumber=5090904&count=326&index=290},
  researchr = {https://researchr.org/publication/BaeMV09},
  cites = {0},
  citedby = {0},
  pages = {1524-1529},
  booktitle = {Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009},
  publisher = {IEEE},
}