The High-Performance Convolution Design and Implementation Using Parallel Memory Processing and Shift Register Pipeline

Youngseok Baek, Bontae Koo. The High-Performance Convolution Design and Implementation Using Parallel Memory Processing and Shift Register Pipeline. In International Conference on Electronics, Information, and Communication, ICEIC 2024, Taipei, Taiwan, January 28-31, 2024. pages 1-4, IEEE, 2024. [doi]

@inproceedings{BaekK24-0,
  title = {The High-Performance Convolution Design and Implementation Using Parallel Memory Processing and Shift Register Pipeline},
  author = {Youngseok Baek and Bontae Koo},
  year = {2024},
  doi = {10.1109/ICEIC61013.2024.10457129},
  url = {https://doi.org/10.1109/ICEIC61013.2024.10457129},
  researchr = {https://researchr.org/publication/BaekK24-0},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {International Conference on Electronics, Information, and Communication, ICEIC 2024, Taipei, Taiwan, January 28-31, 2024},
  publisher = {IEEE},
  isbn = {979-8-3503-7188-8},
}