Mohammed Bahoura, Chan-Wang Park. FPGA-implementation of high-speed MLP neural network. In 18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011. pages 426-429, IEEE, 2011. [doi]
@inproceedings{BahouraP11,
title = {FPGA-implementation of high-speed MLP neural network},
author = {Mohammed Bahoura and Chan-Wang Park},
year = {2011},
doi = {10.1109/ICECS.2011.6122304},
url = {http://dx.doi.org/10.1109/ICECS.2011.6122304},
researchr = {https://researchr.org/publication/BahouraP11},
cites = {0},
citedby = {0},
pages = {426-429},
booktitle = {18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011},
publisher = {IEEE},
isbn = {978-1-4577-1845-8},
}