Abstract is missing.
- An efficient VLSI implementation of H.264/AVC intra-frame transcoderMichael Guarisco, Eric Dabellani, Nicolas Marques, Hassan Rabah, Yves Berviller, Serge Weber. 1-4 [doi]
- A system aproach for reducing power consumption of multimedia devices with a low QoE impactWilly Aubry, Bertrand Le Gal, Dominique Dallet, Simon Desfarges, Daniel Negru. 5-8 [doi]
- Study of interpolation filters for motion estimation with application in H.264/AVC encodersGeorgios Georgis, George Lentaris, Dionysios I. Reisis. 9-12 [doi]
- HW/SW TQ/IQT design for H.264/AVCAhmed Ben Atitallah, Hassen Loukil, Nouri Masmoudi. 13-16 [doi]
- Estimating the design value(s) of the shunt-peaking inductor(s) in CMOS trans-impedance amplifier system by placement of poles and zerosRabin Raut, Md. A. H. Talukder. 17-20 [doi]
- th order 52dB-DR continuous-time analog filter for DVB-T receiversMarcello De Matteis, Giuseppe Cocciolo, Marco De Blasi, Andrea Baschirotto. 21-24 [doi]
- A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systemsNicolas Laflamme-Mayer, Yves Blaquière, Mohamad Sawan. 25-28 [doi]
- Design of a programmable analog CMOS rational-powered membership function generator in current mode approachSajjad Moshfe, Abdollah Khoei, Khayrollah Hadidi, Pourya Hoseini. 29-32 [doi]
- Mixed symbolic-numerical techniques in fault diagnosis using fault rubber stampsFawzi M. Al-Naima, Bessam Z. Al-Jewad. 33-36 [doi]
- An all-digital clock and data recovery circuit for low-to-moderate data rate applicationsN. Tall, Nicolas Dehaese, Sylvain Bourdel, B. Bonat. 37-40 [doi]
- PSCML: Pseudo-Static Current Mode LogicYier Jin, Yiorgos Makris. 41-44 [doi]
- Adapting a C-element design flow for low powerMatheus T. Moreira, Bruno Cruz de Oliveira, Julian J. H. Pontes, Fernando Moraes, Ney Calazans. 45-48 [doi]
- Implementation of a cost efficient SSL based on an Angular beamformer SRP-PHATHamid R. Zarghi, Mohammad Sharifkhani, Iman Gholampour. 49-52 [doi]
- Gate-level autonomous watchdog circuit for error robustness based on a 65nm self synchronous systemBenjamin Stefan Devlin, Makoto Ikeda, Kunihiro Asada. 53-56 [doi]
- A low-power 2 GHz discrete time weighting system dedicated to Sampled Analog Signal ProcessingY. Abiven, Francois Rivet, Yann Deval, Dominique Dallet, Didier Belot, Thierry Taris. 57-60 [doi]
- On provisioning high quality in intelligent transportation servicesHamada Alshaer, Raed Shubair, Thierry Ernst, Arnaud de La Fortelle. 61-64 [doi]
- Model-based design and distributed implementation of bus arbiter for multiprocessorsImene Ben Hafaiedh, Susanne Graf, Mohamad Jaber. 65-68 [doi]
- Feed-forward ΔΣ modulators topologies design for broadband communications applicationsHouda Daoud, Samir Ben Salem, Sonia Zouari, Mourad Loulou. 69-72 [doi]
- Adaptive digital tanlock loop with no delayMahmoud Al-Qutayri, Saleh R. Al-Araji, Omar Al-Kharji Al-Ali, Nader Anani. 73-76 [doi]
- A 1V 115μW 20nV/√Hz 15-50dB-range PGA with 5MHz bandwidth for UWB personal area networkMarcello De Matteis, Marco De Blasi, Giuseppe Cocciolo, Andrea Baschirotto, M. Sabatini. 77-80 [doi]
- Sensor node processor for security applicationsGoran Panic, Thomas Basmer, Oliver Schrape, Steffen Peter, Frank Vater, Klaus Tittelbach-Helmrich. 81-84 [doi]
- New reader anti-collision algorithm for dense RFID environmentsChristine Meguerditchian, Haïdar Safa, Wassim El-Hajj. 85-88 [doi]
- Hardware-accelerated address-event processing for high-speed visual object recognitionMichael Hofstätter, Martin Litzenberger, Daniel Matolin, Christoph Posch. 89-92 [doi]
- A multisensor data fusion approach for improving the classification accuracy of uterine EMG signalsBassam Moslem, Mohamad Khalil, Mohamad O. Diab, Aly Chkeir, Catherine Marque. 93-96 [doi]
- 1.05V 10.2mW WCDMA analog baseband in 65nm digital CMOS technologySergio Pernici, Pierangelo Confalonieri, Riccardo Martignone, Andrea Barbieri, Francesca Girardi, Alessandro Mecchia, Daniele Devecchi, Germano Nicollini. 97-100 [doi]
- High pass filter implementation comparison in unity STF high pass ΔΣ modulatorVan Tam Nguyen, Hasham Ahmed Khushk, Chadi Jabbour, Patrick Loumeau. 101-104 [doi]
- Analysis and design of an analog control loop for digital input class D amplifiersRemy Cellier, Gaël Pillonnet, Nacer Abouchi, Roberto M'Rad, Angelo Nagari. 105-108 [doi]
- Robust power oscillator design for inductive-power link applicationsQingyun Ma, Mohammad Rafiqul Haider, Yehia Massoud. 109-112 [doi]
- A 2-GS/s 0.35μm SiGe track-and-hold amplifier with 7-GHz analog bandwidth using a novel input bufferDamiano Cascella, Gianfranco Avitabile, Francesco Cannone, Giuseppe Coviello. 113-116 [doi]
- A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platformSylvain Clerc, Fady Abouzeid, Fabrice Argoud, Abhay Kumar, Rajesh Kumar, Philippe Roche. 117-120 [doi]
- An FPGA system using fuzzy clustering and correlation to diagnose anginaEvaldo Renó Faria Cintra, Tales Cleber Pimenta, Helton Carvalho, Robson L. Moreno. 121-124 [doi]
- Multi-electrode system for pacemaker applicationsIslam Seoudi, Karima Amara, Fabrice Gayral, Renzo Dal Molin, Amara Amara. 125-128 [doi]
- Design of a scalable DNA shearing system using phased-array ultrasonic transducerKapil Dev, Smriti Sharma, Vibhu Vivek, Babur Hadimioglu, Yehia Massoud. 129-132 [doi]
- Design of a high efficient fully integrated CMOS rectifier using bootstrapped technique for sub-micron and wirelessly powered applicationsMaryam Karimi, Hooman Nabovati. 133-136 [doi]
- Asymmetric large size multiplication using embedded blocks with efficient compression technique in FPGAsShuli Gao, Dhamin Al-Khalili, Noureddine Chabini. 137-140 [doi]
- Reversible implementation of square-root circuitSayeeda Sultana, Katarzyna Radecka. 141-144 [doi]
- X86-ARM binary hardware interpreterHussein Karaki, Haitham Akkary, Shahrokh Shahidzadeh. 145-148 [doi]
- On the impact of encoding on the complexity of residue arithmetic circuitsE. Theodorakis, Vassilis Paliouras. 149-152 [doi]
- An efficient multiple precision floating-point multiplierKonstantinos Manolopoulos, Dionisios I. Reisis, Vassilios A. Chouliaras. 153-156 [doi]
- Performance enhancement of single electron junction 1-bit full adderIftekhar Ibne Basith, Tareq Muhammad Supon, Ajit Muhury, Rashid Rashidzadeh, Majid Ahmadi. 157-160 [doi]
- Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOSSimon Vanden Bussche, Pieter De Wit, Elie Maricau, Georges G. E. Gielen. 161-164 [doi]
- Assessing testing techniques for resistive-open defects in nanometer CMOS addersAhmed Fawaz, Ameen Jaber, Ali Kassem, Ali Chehab, Ayman I. Kayssi. 165-168 [doi]
- Hybrid nanoparticle biomarkers in Near-Field Optical MicroscopyNayla El-Kork, Raed M. Shubair, Paul Moretti, Bernard Jacquier. 169-175 [doi]
- Comparison on the performance of the confined-chacogenide with thin metal interlayer and optimised lateral phase change memoriesSantipab Sainon, Sanchai Harnsoongnoen, Chiranut Sa-ngiamsak. 176-179 [doi]
- Test setup and spurious replicas identification in time-quantized pseudorandom sampling-based ADC in SDR multistandard receiverManel Ben-Romdhane, Asma Maalej, Rihab Lahouli, Chiheb Rebai. 180-183 [doi]
- Prefilter bandwidth effects in sequential symbol synchronizers based on pulse comparison operating by positive transitions at quarter rateAntonio D. Reis, José F. Rocha, Atílio Gameiro, José P. Carvalho. 184-187 [doi]
- Mixed-Mode I/Q mismatches compensation in low-IF quadrature receiversNaveen Naraharisetti, Sleiman Bou Sleiman, Mohammed Ismail. 188-191 [doi]
- Configurable baseband digital transceiver for Gbps wireless 60 GHz communicationsDionysios Diamantopoulos, Panagiotis Galiatsatos, A. Karachalios, George Lentaris, Dionisios I. Reisis, Dimitrios Soudris. 192-195 [doi]
- Fully integrated ultra-low-power 900 MHz RF transceiver for batteryless wireless microsystemsChelho Chung, Young Han Kim, Tae-Hun Ki, Kyusung Bae, Jongbae Kim. 196-199 [doi]
- A reliable full-swing low-distortion CMOS bootstrapped sampling switchMohammad Reza Asgari, Seyyed Hossein Pishgar, Omid Hashemipour. 200-203 [doi]
- On the design of balanced carbon nanotube field-effect transistor gatesKapil Dev, Yehia Massoud. 204-207 [doi]
- Efficient modeling and analysis of switch-induced error voltage in high resolution SAR ADCsSamaneh Babayan Mashhadi, Seyyed Iman Pishbin. 208-211 [doi]
- A low power 1-V 10-bit 40-MS/s pipeline ADCMohsen Hashemi, Mohammad Sharifkhani, Mohammad Gholami. 212-215 [doi]
- Code-independent output impedance: A new approach to increasing the linearity of current-steering DACsXueqing Li, Qi Wei, Huazhong Yang. 216-219 [doi]
- Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technologyMohamed Abbas, Takahiro J. Yamaguchi, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada. 220-223 [doi]
- High order mismatch noise shaping for bandpass DACsVincent O'Brien, Brendan Mullane. 224-227 [doi]
- PSP based DCG-FGT transistor model including characterization procedureA. Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean Michel Portal, Rachid Bouchakour. 228-231 [doi]
- An audio band low voltage CT-ΔΣ modulator with VCO-based quantizerBahman Yousefzadeh, Mohammad Sharifkhani. 232-235 [doi]
- High-pass or low-pass ΣΔ modulators?Chadi Jabbour, Hasham Ahmed Khushk, Van Tam Nguyen, Patrick Loumeau. 236-239 [doi]
- Optimal filtering of an incremental second-order MASH11 sigma-delta modulatorSylvain Maréchal, François Krummenacher, Maher Kayal. 240-243 [doi]
- A novel design methodology for multiplierless filters applied on ΔΣ decimatorsChadi Jabbour, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau. 244-247 [doi]
- High level characterization and optimization of a GPSK modulator with genetic algorithmS. Sahnoun, Ahmed Fakhfakh, Nouri Masmoudi, Hervé Levi. 248-251 [doi]
- Power-loss reduction of a MOSFET cross-coupled rectifier by employing zero-voltage switchingQingyun Ma, Mohammad Rafiqul Haider, Yehia Massoud. 252-255 [doi]
- A tracking algorithm suitable for embedded systems implementationRana Farah, Qifeng Gan, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau, Yvon Savaria. 256-259 [doi]
- Performance evaluation of Sigma Delta Zero Crossing DPLLQassim Nasir, Saleh R. Al-Araji. 260-263 [doi]
- A 2000°/s dynamic range bulk mode dodecagon gyro for a commercial SOI technologyMohannad Elsayed, Frederic Nabki, Mourad N. El-Gamal. 264-267 [doi]
- Design of a 2-axis MEMS accelerometerJean Marie Darmanin, Ivan Grech, Edward Gatt, Owen Casha. 268-271 [doi]
- Analytical modeling and design of ring shaped piezoelectric transducersKapil Dev, Vibhu Vivek, Babur Hadimioglu, Yehia Massoud. 272-275 [doi]
- A low cost sensing system for foot stress recovering on a Freeman platformSamir Boukhenous, Mokhtar Attari. 276-280 [doi]
- Fully-integrated, large-time-constant, low-pass, Gm-C filter based on current conveyorsMohammad Hossein Maghami, Amir M. Sodagar. 281-284 [doi]
- Stereoscopic image sensor with low-cost RGB filters tunned for the visible rangeJoão Paulo Carmo, R. P. Rocha, Manuel F. Silva, D. S. Ferreira, Joao F. Ribeiro, José Higino Correia. 285-288 [doi]
- A prototype circuit for a smart 3D endoscopic videocapsule based on SVM and stereovisionJade Ayoub, Bertrand Granado, Olivier Romain, Yasser Mohanna. 289-292 [doi]
- Modulation characteristics for a bidirectional AC-DC converter based on dual active bridge (January 2010)Karim Eduardo Hay Alonso, Abdel Karim Hay Harb, Luis David Prieto Martinez. 293-296 [doi]
- Design of ultra-wide-load, high-efficient DC-DC buck convertersChin-Long Wey, Chan-I. Chiu, Kun-Chun Chang, Chung-Hsien Hsu, Gang-Neng Sung. 297-300 [doi]
- Mathifier - Speech recognition of math equationsSalim N. Batlouni, Hala S. Karaki, Fadi A. Zaraket, Fadi N. Karameh. 301-304 [doi]
- Gauss-Newton image registration with CUDAManal Jalloul, Mohammed Baydoun, Mohamad Adnan Al-Alaoui. 305-309 [doi]
- A random demodulator with a software-based integrator resetting schemeVikas Singal, Yehia Massoud. 310-313 [doi]
- Extremely simple constant-gm technique for low voltage rail-to-rail amplifier input stageBoram Lee, Ted Higman. 314-317 [doi]
- A novel frequency compensation scheme for on-chip low-dropout voltage regulatorsMortaza Mojarad, Mohammad Yavari. 318-321 [doi]
- Design of high gain CMOS LNA with improved linearity using modified derivative superpositionMohammad Javad Zavarei, Ehsan Kargaran, Hooman Nabovati. 322-325 [doi]
- A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C networkAkira Kondou, Masayuki Ikebe, Junichi Motohisa, Yoshihito Amemiya, Eiichi Sano. 326-329 [doi]
- Wideband LNA with reactive feedback at the input matching networkParia Jamshidi, Sasan Naseh. 330-333 [doi]
- High efficiency class-E power amplifier with a new output networkMasoud Yavari, Sasan Naseh. 334-337 [doi]
- Next generation millimeter wave backhaul radio: Overall system design for GbE 60GHz PtP wireless radio of high CMOS integrationRodoula Makri, Petros Tsenes, Dimitrios Economou, Yannis Papananos, Dimitrios Dervenis, Michael K. Birbas, John C. Kikidis, Vassilis Paliouras, Grigorios Kalivas, Alexios N. Birbas, Panos Karaivazoglou, Yorgos Stratakos, John Korinthios, Stelios Siskos, Alkis A. Hatzopoulos, John Komninos, Serafeim Katsikas, Konstantinos N. Voudouris, Andreas Rigas, George Agapiou, Polivios Raxis. 338-341 [doi]
- Design of a 1.2-V 60 GHz transceiver in a 90nm CMOS RF technologyPaschalis Simitsakis, Spyros Liolis, Dimitris Psyllos, Lampros Mountrichas, Paul P. Sotiriadis. 342-345 [doi]
- Digital baseband challenges for a 60GHz gigabit linkNikos Kanistras, I. Tsatsaragkos, Ahmed Mahdi, Konstantina Karagianni, Vassilis Paliouras, Fotios Gioulekas, E. Lalos, K. Adaos, Michael K. Birbas, Panos Karaivazoglou, M. V. Koziotis, M. Perakis. 346-349 [doi]
- A 60-GHz quadrature PLL in 90nm CMOSFotis Plessas, V. Panagiotopoulos, Vasilios Kalenteridis, George Souliotis, F. Liakou, Sotiris Koutsomitsos, Stilianos Siskos, Alexios N. Birbas. 350-353 [doi]
- CAD tools for fast analysis of parasitic coupling and mismatch effects in switched-capacitor circuitsSylvain Maréchal, François Krummenacher, Maher Kayal. 354-357 [doi]
- SEGP-Finder: Tool for identification of Soft Error Glitch-Propagating paths at gate levelGhaith Bany Hamad, Otmane Aït Mohamed, Syed Rafay Hasan, Yvon Savaria. 358-361 [doi]
- An evolutionary method for analog circuits optimization utilizing Mosfet-C filtersBadar K. Khan, Yaser M. A. Khalifa. 362-365 [doi]
- A greedy algorithm for wire length optimizationYiming Li, Yi Li, Mingtian Zhou. 366-369 [doi]
- FPGA-based programmable digital PLL with very high frequency resolutionJ. Bouloc, L. Nony, C. Loppacher, Wenceslas Rahajandraibe, F. Bocquet, L. Zaid. 370-373 [doi]
- FPGA-based hardware acceleration: A CPU/accelerator interface explorationPaulo Da Cunha Possa, David Schaillie, Carlos Valderrama. 374-377 [doi]
- CAD tool for parameterized FPGA based FFT architecturesTodd E. Schmuland, Mohsin M. Jamali, Matthew B. Longbrake, Peter E. Buxa. 378-381 [doi]
- Customized embedded processor design for global photographic tone mappingShervin Vakili, Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria, Guy Bois. 382-385 [doi]
- A 500 nA quiescent, 100 mA maximum load CMOS low-dropout regulatorJohn Hu, Brian Hu, Yanli Fan, Mohammed Ismail. 386-389 [doi]
- Conducted EMI prediction for integrated class D audio amplifierRoberto M'Rad, Florent Morel, Gaël Pillonnet, Christian Vollaire, Angelo Nagari. 390-393 [doi]
- A solar battery charger with maximum power point trackingMarc Pastre, François Krummenacher, Onur Kazanc, Naser Khosro Pour, Catherine Pace, Stefan Rigert, Maher Kayal. 394-397 [doi]
- Autonomous ultra-low power DC/DC converter for Microbial Fuel CellsS.-E. Adami, Nicolas Degrenne, Christian Vollaire, Bruno Allard, François Buret, François Costa. 398-401 [doi]
- 1.05V on-request 10b General-Purpose ADC in 65nm digital CMOS technologyMarco Zamprogno, Alberto Minuti, Francesca Girardi, Daniele Devecchi, Germano Nicollini. 402-405 [doi]
- A parallel, CT-ΔΣ based ADC for OFDM UWB receivers in 130 nm CMOSJokin Segundo, Jesús Arias, Luis Quintanilla, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente. 406-409 [doi]
- Design of an 8Gsps, 65nm CMOS wideband flash ADCD. Mattos, S. Gauffre, P. Hellmuth, P. Cais, J.-L. Pedroza, Jean-Baptiste Begueret, A. Baudry. 410-413 [doi]
- Dual quantization continuous time ΣΔ modulators with spectrally shaped feedbackHossein Pakniat, Mohammad Yavari. 414-417 [doi]
- A new digital background correction algorithm with non-precision calibration signals for pipelined ADCsBehzad Zeinali, Mohammad Yavari. 418-421 [doi]
- Performance analysis of random demodulators with M-sequences and Kasami sequencesVikas Singal, Sami Smaili, Yehia Massoud. 422-425 [doi]
- FPGA-implementation of high-speed MLP neural networkMohammed Bahoura, Chan-Wang Park. 426-429 [doi]
- A hardware efficient chaotic ring oscillator based true random number generatorIhsan Cicek, Günhan Dündar. 430-433 [doi]
- Enhancing synchronizability of complex networks by community weakeningJin Fan. 434-437 [doi]
- CMOS-compatible structure for voltage-mode multiple-valued logic circuitsMohammad S. Eslampanah Sendi, Mohammad Sharifkhani, Amir M. Sodagar. 438-441 [doi]
- A1CSA: An energy-efficient fast adder architecture for cell-based VLSI designJucemar Monteiro, José Luís Güntzel, Luciano Volcan Agostini. 442-445 [doi]
- A Low Cost circuit level fault detection technique to Full Adder designSayyed Hasan Mozafari, Mahdi Fazeli, Shaahin Hessabi, Seyed Ghassem Miremadi. 446-450 [doi]
- Design of new full adder cell using hybrid-CMOS logic styleMohammad Javad Zavarei, Mohammad Reza Baghbanmanesh, Ehsan Kargaran, Hooman Nabovati, Abbas Golmakani. 451-454 [doi]
- Fast binary/decimal adder/subtractor with a novel correction-free BCD additionOsama Al-Khaleel, Mohammad Al-Khaleel, Zakaria Al-Qudah, Christos A. Papachristou, Khaldoon Mhaidat, Francis G. Wolff. 455-459 [doi]
- High speed area reduced 64-bit static hybrid carry-lookahead/carry-select adderHabib Ghasemizadeh Tamar, Akbar Ghasemizadeh Tamar, Khayrollah Hadidi, Abdollah Khoei, Pourya Hoseini. 460-463 [doi]
- A fully integrated Hall sensor microsystem with current-mode outputAndrea Ajbl, Marc Pastre, Maher Kayal. 464-467 [doi]
- Interface electronics for tactile sensing arraysLuigi Pinna, Giorgio Carlini, Lucia Seminara, Maurizio Valle. 468-471 [doi]
- An improved smart readout technique based on temporal redundancies suppression designed for logarithmic CMOS image sensorHawraa Amhaz, Hassan Abbass, Hakim Zimouche, Gilles Sicard. 472-475 [doi]
- Smart readout design for tactile sensing devicesLeonardo Barboni, Maurizio Valle, Giorgio Carlini. 476-479 [doi]
- Current-mode motion detector sensor using copier cell in CMOS technologyM. M. Silva, J. W. Swart, Luiz Carlos Moreira, Wilhelmus A. M. Van Noije. 480-483 [doi]
- A self-sufficient digitally controlled ring oscillator compensated for supply voltage variationMehdi Terosiet, Sylvain Feruglio, Farouk Vallette, Patrick Garda, Olivier Romain, Julien Le Kernec. 484-487 [doi]
- A 2.4GHz ultra-low power current-reuse bleeding mixer with resistive feedbackHassene Kraimia, Thierry Taris, Jean-Baptiste Begueret, Yann Deval. 488-491 [doi]
- Enabling efficient built-in-self-calibration for RFICsSleiman Bou Sleiman, Mohammed Ismail. 492-495 [doi]
- Effective throughput 1 Gbps-class millimeter-wave wireless systemFumio Ozawa, Toru Taniguchi, Yasuhiro Toriyama, Jun Kobayashi, Kazuya Kojima. 496-499 [doi]
- A K-band UWB CMOS pulse-mode radar transmitterKristian G. Kjelgard, Tor Sverre Lande. 500-503 [doi]
- Linear and nonlinear crosstalk in MIMO OFDM transceiversTahereh Sadeghpour, R. A. Abd-Alhameed, Nazar T. Ali, Issa T. E. Elfergani, Y. A. S. Dama, Ogbonnaya O. Anoh. 504-507 [doi]
- Envelope correlation formula for (N, N) MIMO antenna array including power lossesY. A. S. Dama, Abubakar Sadiq Hussaini, R. A. Abd-Alhameed, Steve M. R. Jones, Neil J. McEwan, Tahereh Sadeghpour, Jonathan Rodriguez. 508-511 [doi]
- Tunable RF filters: Survey and beyondAbubakar Sadiq Hussaini, Raed A. Abd-Alhameed, Jonathan Rodriguez. 512-515 [doi]
- A novel dual band tunable balanced handset antenna for WLAN applicationIssa T. E. Elfergani, Raed A. Abd-Alhameed, Nazar T. Ali, A. G. Alhaddad, Chan H. See, E. H. Cabongomuqueba. 516-519 [doi]
- Memory controller for globally uncoordinated and locally coordinated checkpointingYoann Congal, Mickael Cartron. 520-523 [doi]
- 256-KB associativity-reconfigurable cache with 7T/14T SRAM for aggressive DVS down to 0.57 VJinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi, Masahiko Yoshimoto. 524-527 [doi]
- A novel low power 64-kb SRAM using bit-lines charge-recycling and non-uniform cell schemeXu Wang, Jian-Fei Jiang, Zhi-Gang Mao, Bingjing Ge, Xinglong Zhao. 528-531 [doi]
- A multi-bit error tolerant register file for a high reliable embedded processorSiamak Esmaeeli, Morteza Hosseini, Bijan Vosoughi Vahdat, Bizhan Rashidian. 532-537 [doi]
- Test data compression based on the reuse of parts of the dictionary entriesP. Sismanoglou, Dimitris Nikolos. 538-541 [doi]
- Automatic generation of memory consistency tests for chip multiprocessingEberle A. Rambo, Olav P. Henschel, Luiz C. V. dos Santos. 542-545 [doi]
- Efficient periodic clock calculus in latency-insensitive designMahdi Zare, Shaahin Hessabi, Maziar Goudarzi. 546-549 [doi]
- Design space pruning of MPSoCs using weighted sub-samplingAli Kokhazadeh, Omid Fatemi. 550-553 [doi]
- Novel FIR approximations of IIR differentiators with applications to image edge detectionMohamad Adnan Al-Alaoui. 554-558 [doi]
- Recursive implementation of exponential linear phase FIR filtersFiras Hassan, Sami Khorbotly. 559-562 [doi]
- Compact code generation for embedded applications on digital signal processorsHassan Salamy. 563-566 [doi]
- Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realizationSidinei Ghissoni, Eduardo Costa, José C. Monteiro, Ricardo Reis. 567-570 [doi]
- A wide-frequency-range fractional-N synthesizer for clock generation in 65nm CMOSYe Zhang, Niklas Zimmermann, Ralf Wunderlich, Stefan Heinen. 571-574 [doi]
- Design and simulation of a switched capacitor ladder filter in a 90nm CMOS technology for WiMAX applicationsMohamad Reza Nazemi, Hossein Shamsi, Saeed Mehregan. 575-578 [doi]
- Performance evaluation of linear and circular arrays in wireless sensor network localizationAhmed Rashed Kulaib, Raed M. Shubair, Mahmoud Al-Qutayri, Jason W. P. Ng. 579-582 [doi]
- Performance evaluation of distributed Tarokh SFBC and Alamouti MISO for SFN DVB-T2 broadcast networksMokhtar Tormos, Camel Tanougast, Abbas Dandache, Pierre Bretillon, Pierre Kasser. 583-586 [doi]
- Performance evaluation of heuristic techniques for coverage optimization in femtocellsLina S. Mohjazi, Mahmoud Al-Qutayri, Hassan R. Barada, Kin Fai Poon. 587-590 [doi]
- Design of low voltage low power dual-band LNA with forward body biasing techniqueAli Reza Dehqan, Khalil Mafinezhad, Ehsan Kargaran, Hooman Nabovati. 591-594 [doi]
- Design of a CMOS LNA for the upper band of UWB receiversAbdol-Hamid Zaker, Hossein Shamsi, Saeed Gholami, Mahdi Pourshamsaiee. 595-598 [doi]
- A new scheme of coupling VCOs for the purpose of injection locking frequency dividerMasoud Rezaei, Hassan Sepehrian, Sasan Naseh. 599-602 [doi]
- The effect of ground bond-wire on the performance of CMOS class-E power amplifiersMasoud Yavari, Sasan Naseh. 603-606 [doi]
- All-digital 400∼900 MHz power amplifier consuming 0.03 mW/MHz using 0.18 μm CMOSSanad Bushnaq, Makoto Ikeda, Kunihiro Asada. 607-610 [doi]
- A low power 9GHz divide-by-3 injection locked frequency divider in 0.18μm CMOS with 15% locking rangeSomaye Asadian, Mohammad Jafar Hemmati, Sasan Naseh. 611-614 [doi]
- Multi-user time-hopping IR-UWB generator based on FPGA with high-speed serial moduleAchraf Mallat, Pierre Gérard, Luc Vandendorpe. 615-618 [doi]
- Tunable low-pass active filter using active capacitor for multimode standardsRaafat Lababidi, Dominique Lo Hine Tong, Ali Louzir, Jean-Luc Robert, Jean-Yves Le Naour, Julien Lintignat, Bernard Jarry, Bruno Barelaud. 619-622 [doi]
- A very wideband low noise amplifier for cognitive radiosAmirhossein Ansari, Mohammad Yavari. 623-626 [doi]
- A digital circuit for extracting singular points from fingerprint imagesRosario Arjona, Iluminada Baturone. 627-630 [doi]
- Combining multiple support vector machines for boosting the classification accuracy of uterine EMG signalsBassam Moslem, Mohamad Khalil, Mohamad O. Diab, Aly Chkeir, Catherine Marque. 631-634 [doi]
- Fast and flexible genetic algorithm processorPourya Hoseini, Abdollah Khoei, Khayrollah Hadidi, Sajjad Moshfe. 635-638 [doi]
- Real time tracking trajectory in workspace for ANAT robot manipulator using hierarchical controlRaouf Fareh, Maarouf Saad, Abdelkrim Brahmi, Mohamad Saad. 639-642 [doi]
- A new adaptive fuzzy FDI method for Bond Graph uncertain parameters systemsWalid Bouallegue, Salma Bouslama Bouabdallah, Moncef Tagina. 643-648 [doi]
- A study on switched-capacitor blocks for reconfigurable ADCsPrakash Harikumar, Anu Kalidas Muralidharan Pillai, J. Jacob Wikner. 649-652 [doi]
- Dynamic routing strategy for embedded distributed architecturesCeline Azar, Stéphane Chevobbe, Yves Lhuillier, Jean-Philippe Diguet. 653-656 [doi]
- Controlling the bandwidth of Bulk Acoustic Wave filter using a decoder designed on 65nm processKamal Baraka, Eric Kerherve, Jean-Marie Pham, Moustapha El Hassan. 657-660 [doi]
- A 90-nm CMOS resistor-free compact trimmable voltage reference for ultra-low power low cost applicationsAnass Samir, Edith Kussener, Wenceslas Rahajandraibe, Ludovic Girardeau, Yannick Bert, Hervé Barthélemy. 661-664 [doi]
- A C-embedded algorithm for real-time monocular SLAMAurélien Gonzalez, Jean-Marie Codol, Michel Devy. 665-668 [doi]
- A non-linear control of electric vehicle driven by induction motorsBekkouche Djamal-Dine, Hakiki Khalid, Bouhamida Mohammed, Benabdellah Tewfik. 669-672 [doi]
- Visual navigation of communicating vehicles in unknown and changing environmentDavid A. Marquez-Gamez, Michel Devy. 673-676 [doi]
- High performance 4: 1 multiplexer with ambipolar double-gate FETsKotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux. 677-680 [doi]
- A CNFET-based characterization framework for digital circuitsJacques L. Athow, Come Rozon, Dhamin Al-Khalili, J. M. Pierre Langlois. 681-684 [doi]
- A small footprint interleaved multithreaded processor for embedded systemsCharly Bechara, Aurelien Berhault, Nicolas Ventroux, Stéphane Chevobbe, Yves Lhuillier, Raphaël David, Daniel Etiemble. 685-690 [doi]
- Circuit authentication based on Ring-Oscillator PUFsSusana Eiroa, Iluminada Baturone. 691-694 [doi]
- Middleware switch ASIC implementationVladimir Petrovic, Günter Schoof, Sergio Montenegro. 695-698 [doi]
- FPGA active digital cochlea modelChristian Mugliette, Ivan Grech, Owen Casha, Edward Gatt, Joseph Micallef. 699-702 [doi]
- Cell stack length using an enhanced logical effort model for a library-free paradigmHisham El-Masry, Dhamin Al-Khalili. 703-706 [doi]
- Strategic placement of reliable routers for the optimization of dependable dynamic NoCCedric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache. 707-710 [doi]
- An ultra-fast hybrid simulation framework for ASIPJi Qiu, Xiang Gao, Yifei Jiang, Xu Xiao. 711-714 [doi]
- Power, performance and area prediction of 3D ICs during early stage design exploration in 45nmFilippos Toufexis, Antonis Papanikolaou, Dimitrios Soudris, George I. Stamoulis, Sotiris Bantas. 715-718 [doi]
- Fast estimation of memory consumption for energy-efficient compilersEmilio Wuerges, Rômulo Silva de Oliveira, Luiz C. V. dos Santos. 719-722 [doi]
- System-level energy estimation with PowersimMarco Giammarini, Massimo Conti, Simone Orcioni. 723-726 [doi]
- Activity management in battery-powered embedded systems: A case study of ZigBee® WSNHouman Zarrabi, A. J. Al-Khalili, Yvon Savaria. 727-731 [doi]
- Rules class approach to scheduling algorithmsMartin Dubois, Mounir Boukadoum. 732-735 [doi]
- High-level design and synthesis of a resource schedulerJoao Paulo Pizani Flor, Tiago Rogério Mück, Antônio Augusto Fröhlich. 736-739 [doi]
- Power consumption in transistor networks versus in standard cellsGerson Scartezzini, Ricardo Reis. 740-743 [doi]
- A higher radix FFT FPGA implementation suitable for OFDM systemsMarwan A. Jaber, Daniel Massicotte, Youssef Achouri. 744-747 [doi]
- ILP formulation for hybrid FPGA MPSoCs optimizing performance, area and memory usageCalliope-Louisa Sotiropoulou, Spiridon Nikolaidis. 748-751 [doi]
- Design and experimentation with low-power morphable multipliersEfstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos, Dimitrios Soudris. 752-755 [doi]
- A dynamic way cache locking scheme to improve the predictability of power-aware embedded systemsAbu Asaduzzaman, Fadi N. Sibai, Abdullah A. Abonamah. 756-759 [doi]
- Image processing technique for segmenting microstructural porosity of laser-welded thermoplasticsKarl Leboeuf, Iman Makaremi, Roberto Muscedere, Majid Ahmadi. 760-763 [doi]
- Partitioned EDF scheduling in multicore systems with quality of service constraintsNadine Abdallah, Audrey Queudet, Maryline Chetto, Rafic Hage Chehade. 764-767 [doi]
- Quality of service facilities for firm real-time energy harvesting systemsMaissa Abdallah, Maryline Chetto, Audrey Queudet, Rafic Hage Chehade. 768-771 [doi]
- Nonlinear control of an upper-limb exoskelton robotMohammad Habibur Rahman, Thierry Kittel-Ouimet, Maarouf Saad, Jean-Pierre Kenné, Philippe S. Archambault. 772-775 [doi]
- EH-EDF: An on-line scheduler for real-time energy harvesting systemsHussein El Ghor, Maryline Chetto, Rafic Hage Chehade. 776-779 [doi]
- A GPGPU-based software implementation of the PBDI deinterlacing algorithmGilbert Kowarzyk, Normand Bélanger, Yvon Savaria. 780-783 [doi]
- Performances of switching algorithm methods in MIMO-OFDM systemsYosra Mlayeh, Fatma Rouissi, Fethi Tlili, Adel Ghazel. 784-787 [doi]
- Real-time architecture on FPGA for obstacle detection using inverse perspective mappingDiego A. Botero Galeano, Michel Devy, Jean-Louis Boizard, Wassim Filali. 788-791 [doi]
- A highly accurate fully programmable fuzzifier in current mode approachSajjad Moshfe, Abdollah Khoei, Khayrollah Hadidi. 792-795 [doi]