Subhashini Balakrishnan, Sofiène Tahar. A Hierarchical Approach to the Formal Verification of Embedded Systems Using MDGs. In 9th Great Lakes Symposium on VLSI (GLS-VLSI 99), 4-6 March 1999, Ann Arbor, MI, USA. pages 284-287, IEEE Computer Society, 1999. [doi]
@inproceedings{BalakrishnanT99,
title = {A Hierarchical Approach to the Formal Verification of Embedded Systems Using MDGs},
author = {Subhashini Balakrishnan and Sofiène Tahar},
year = {1999},
url = {http://csdl.computer.org/comp/proceedings/glsvlsi/1999/0104/00/01040284abs.htm},
tags = {systematic-approach},
researchr = {https://researchr.org/publication/BalakrishnanT99},
cites = {0},
citedby = {0},
pages = {284-287},
booktitle = {9th Great Lakes Symposium on VLSI (GLS-VLSI 99), 4-6 March 1999, Ann Arbor, MI, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-0104-4},
}