FPGA design and implementation of truncated multipliers using bypassing technique - researchr publication authors

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S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, P. S. Mallick. FPGA design and implementation of truncated multipliers using bypassing technique. In K. Gopalan, Sabu M. Thampi, editors, 2012 International Conference on Advances in Computing, Communications and Informatics, ICACCI '12, Chennai, India, August 3-5, 2012. pages 1111-1117, ACM, 2012. [doi]

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