FPGA design and implementation of truncated multipliers using bypassing technique

S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, P. S. Mallick. FPGA design and implementation of truncated multipliers using bypassing technique. In K. Gopalan, Sabu M. Thampi, editors, 2012 International Conference on Advances in Computing, Communications and Informatics, ICACCI '12, Chennai, India, August 3-5, 2012. pages 1111-1117, ACM, 2012. [doi]

@inproceedings{BalamuruganSMM12,
  title = {FPGA design and implementation of truncated multipliers using bypassing technique},
  author = {S. Balamurugan and Balakumaran Srirangaswamy and R. Marimuthu and P. S. Mallick},
  year = {2012},
  doi = {10.1145/2345396.2345574},
  url = {http://doi.acm.org/10.1145/2345396.2345574},
  researchr = {https://researchr.org/publication/BalamuruganSMM12},
  cites = {0},
  citedby = {0},
  pages = {1111-1117},
  booktitle = {2012 International Conference on Advances in Computing, Communications and Informatics, ICACCI '12, Chennai, India, August 3-5, 2012},
  editor = {K. Gopalan and Sabu M. Thampi},
  publisher = {ACM},
  isbn = {978-1-4503-1196-0},
}