An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing

Aydin O. Balkan, Gang Qu, Uzi Vishkin. An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing. In Limor Fix, editor, Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008. pages 435-440, ACM, 2008. [doi]

@inproceedings{BalkanQV08,
  title = {An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing},
  author = {Aydin O. Balkan and Gang Qu and Uzi Vishkin},
  year = {2008},
  doi = {10.1145/1391469.1391583},
  url = {http://doi.acm.org/10.1145/1391469.1391583},
  researchr = {https://researchr.org/publication/BalkanQV08},
  cites = {0},
  citedby = {0},
  pages = {435-440},
  booktitle = {Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008},
  editor = {Limor Fix},
  publisher = {ACM},
  isbn = {978-1-60558-115-6},
}