Soumya Banerjee, Wenjing Rao. A general approach for highly defect tolerant Parallel Prefix Adder design. In Luca Fanucci, Jürgen Teich, editors, 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016. pages 666-671, IEEE, 2016. [doi]
@inproceedings{BanerjeeR16-0,
title = {A general approach for highly defect tolerant Parallel Prefix Adder design},
author = {Soumya Banerjee and Wenjing Rao},
year = {2016},
url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=7459393},
researchr = {https://researchr.org/publication/BanerjeeR16-0},
cites = {0},
citedby = {0},
pages = {666-671},
booktitle = {2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016},
editor = {Luca Fanucci and Jürgen Teich},
publisher = {IEEE},
isbn = {978-3-9815-3707-9},
}