Jun-Suk Bang, Hyunsik Kim, Kye-Seok Yoon, Sang-Han Lee, Se-Hong Park, Ohjo Kwon, Choongsun Shin, Seonki Kim, Gyu-Hyeong Cho. 11.7 A load-aware pre-emphasis column driver with 27% settling-time reduction in ±18% panel-load RC delay variation for 240Hz UHD flat-panel displays. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 212-213, IEEE, 2016. [doi]
@inproceedings{BangKYLPKSKC16,
title = {11.7 A load-aware pre-emphasis column driver with 27% settling-time reduction in ±18% panel-load RC delay variation for 240Hz UHD flat-panel displays},
author = {Jun-Suk Bang and Hyunsik Kim and Kye-Seok Yoon and Sang-Han Lee and Se-Hong Park and Ohjo Kwon and Choongsun Shin and Seonki Kim and Gyu-Hyeong Cho},
year = {2016},
doi = {10.1109/ISSCC.2016.7417982},
url = {http://dx.doi.org/10.1109/ISSCC.2016.7417982},
researchr = {https://researchr.org/publication/BangKYLPKSKC16},
cites = {0},
citedby = {0},
pages = {212-213},
booktitle = {2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016},
publisher = {IEEE},
isbn = {978-1-4673-9467-3},
}