Randeep S. Baweja, Devin Ridge, Harpreet S. Dhillon, William C. Headley. FPGA Implementation of a Pseudo-Random Signal Generator for RF Hardware Test and Evaluation. In 39th IEEE International Performance Computing and Communications Conference, IPCCC 2020, Austin, TX, USA, November 6-8, 2020. pages 1-7, IEEE, 2020. [doi]
Abstract is missing.