Performance/area efficiency in chip multiprocessors with micro-caches

Michela Becchi, Mark A. Franklin, Patrick Crowley. Performance/area efficiency in chip multiprocessors with micro-caches. In Utpal Banerjee, José Moreira, Michel Dubois, Per Stenström, editors, Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007. pages 247-258, ACM, 2007. [doi]

@inproceedings{BecchiFC07,
  title = {Performance/area efficiency in chip multiprocessors with micro-caches},
  author = {Michela Becchi and Mark A. Franklin and Patrick Crowley},
  year = {2007},
  doi = {10.1145/1242531.1242567},
  url = {http://doi.acm.org/10.1145/1242531.1242567},
  tags = {caching},
  researchr = {https://researchr.org/publication/BecchiFC07},
  cites = {0},
  citedby = {0},
  pages = {247-258},
  booktitle = {Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007},
  editor = {Utpal Banerjee and José Moreira and Michel Dubois and Per Stenström},
  publisher = {ACM},
  isbn = {978-1-59593-683-7},
}