A graphical system for hierarchical specifications and checkups of VLSI circuits - researchr publication authors

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Bernd Becker, Thomas Burch, Günter Hotz, D. Kiel, Reiner Kolla, Paul Molitor, Hans-Georg Osthof, Gisela Pitsch, Uwe Sparmann. A graphical system for hierarchical specifications and checkups of VLSI circuits. In Gordon Adshead, Jochen A. G. Jess, editors, European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990. pages 174-179, IEEE Computer Society, 1990. [doi]

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