Why area might reduce power in nanoscale CMOS

Paul Beckett, S. C. Goldstein. Why area might reduce power in nanoscale CMOS. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 2329-2332, IEEE, 2005. [doi]

@inproceedings{BeckettG05,
  title = {Why area might reduce power in nanoscale CMOS},
  author = {Paul Beckett and S. C. Goldstein},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1465091},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1465091},
  tags = {C++},
  researchr = {https://researchr.org/publication/BeckettG05},
  cites = {0},
  citedby = {0},
  pages = {2329-2332},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}