Transistor sizing of custom high-performance digital circuits with parametric yield considerations

Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu. Transistor sizing of custom high-performance digital circuits with parametric yield considerations. In Sachin S. Sapatnekar, editor, Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010. pages 781-786, ACM, 2010. [doi]

Authors

Daniel K. Beece

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Jinjun Xiong

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Chandu Visweswariah

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Vladimir Zolotov

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Yifang Liu

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