Scalable interprocedural register allocation for high level synthesis

Rami Beidas, Jianwen Zhu. Scalable interprocedural register allocation for high level synthesis. In Ting-Ao Tang, editor, Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005. pages 511-516, ACM Press, 2005. [doi]

Authors

Rami Beidas

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Jianwen Zhu

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