Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions

Meena Belwal, Madhura Purnaprajna, T. S. B. Sudarshan. Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions. In 25th International Conference on Field Programmable Logic and Applications, FPL 2015, London, United Kingdom, September 2-4, 2015. pages 1-8, IEEE, 2015. [doi]

@inproceedings{BelwalPT15,
  title = {Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions},
  author = {Meena Belwal and Madhura Purnaprajna and T. S. B. Sudarshan},
  year = {2015},
  doi = {10.1109/FPL.2015.7294022},
  url = {http://dx.doi.org/10.1109/FPL.2015.7294022},
  researchr = {https://researchr.org/publication/BelwalPT15},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {25th International Conference on Field Programmable Logic and Applications, FPL 2015, London, United Kingdom, September 2-4, 2015},
  publisher = {IEEE},
  isbn = {978-0-9934-2800-5},
}