Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs

Yosi Ben-Asher, Danny Meisler, Nadav Rotem. Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs. TRETS, 3(3):15, 2010. [doi]

@article{Ben-AsherMR10,
  title = {Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs},
  author = {Yosi Ben-Asher and Danny Meisler and Nadav Rotem},
  year = {2010},
  doi = {10.1145/1839480.1839485},
  url = {http://doi.acm.org/10.1145/1839480.1839485},
  tags = {constraints},
  researchr = {https://researchr.org/publication/Ben-AsherMR10},
  cites = {0},
  citedby = {0},
  journal = {TRETS},
  volume = {3},
  number = {3},
  pages = {15},
}