A general model of concurrency and its implementation as many-core dynamic RISC processors

Thomas A. M. Bernard, Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp, Michiel W. van Tol, Li Zhang. A general model of concurrency and its implementation as many-core dynamic RISC processors. In Walid A. Najjar, Holger Blume, editors, Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2008), Samos, Greece, July 21-24, 2008. pages 1-9, IEEE, 2008. [doi]

Abstract

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