Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa. Logic Minimization and Testability of 2SPP-P-Circuits. In Antonio Núñez, Pedro P. Carballo, editors, 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece. pages 773-780, IEEE Computer Society, 2009. [doi]
@inproceedings{BernasconiCTV09,
title = {Logic Minimization and Testability of 2SPP-P-Circuits},
author = {Anna Bernasconi and Valentina Ciriani and Gabriella Trucco and Tiziano Villa},
year = {2009},
doi = {10.1109/DSD.2009.131},
url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2009.131},
tags = {testing, logic},
researchr = {https://researchr.org/publication/BernasconiCTV09},
cites = {0},
citedby = {0},
pages = {773-780},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece},
editor = {Antonio Núñez and Pedro P. Carballo},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-3782-5},
}