Gérard Berry. Circuit design and verication with Esterel v7 and Esterel Studio. In IEEE International High Level Design Validation and Test Workshop, HLDVT 2007, Irvine, CA, USA, November 7-9, 2007. pages 133-136, IEEE Computer Society, 2007. [doi]
@inproceedings{Berry07-0,
title = {Circuit design and verication with Esterel v7 and Esterel Studio},
author = {Gérard Berry},
year = {2007},
doi = {10.1109/HLDVT.2007.4392800},
url = {http://doi.ieeecomputersociety.org/10.1109/HLDVT.2007.4392800},
researchr = {https://researchr.org/publication/Berry07-0},
cites = {0},
citedby = {0},
pages = {133-136},
booktitle = {IEEE International High Level Design Validation and Test Workshop, HLDVT 2007, Irvine, CA, USA, November 7-9, 2007},
publisher = {IEEE Computer Society},
isbn = {978-1-4244-1480-2},
}