Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation

Florent Berthelot, Fabienne Nouvel, D. Houzet. Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation. In 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece. IEEE, 2006. [doi]

Authors

Florent Berthelot

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Fabienne Nouvel

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D. Houzet

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