Speeding Up AES By Extending a 32 bit Processor Instruction Set

Guido Bertoni, Luca Breveglieri, Farina Roberto, Francesco Regazzoni. Speeding Up AES By Extending a 32 bit Processor Instruction Set. In 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA. pages 275-282, IEEE Computer Society, 2006. [doi]

Authors

Guido Bertoni

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Luca Breveglieri

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Farina Roberto

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Francesco Regazzoni

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