Madhu Bhaskaran, Sharath Sriram, Aleksandar Stojcevski, Aladin Zayegh. Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply. In Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2006), 17-19 January 2006, Kuala Lumpur, Malaysia. pages 219-222, IEEE Computer Society, 2006. [doi]
@inproceedings{BhaskaranSSZ06,
title = {Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply},
author = {Madhu Bhaskaran and Sharath Sriram and Aleksandar Stojcevski and Aladin Zayegh},
year = {2006},
doi = {10.1109/DELTA.2006.30},
url = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.30},
tags = {design},
researchr = {https://researchr.org/publication/BhaskaranSSZ06},
cites = {0},
citedby = {0},
pages = {219-222},
booktitle = {Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2006), 17-19 January 2006, Kuala Lumpur, Malaysia},
publisher = {IEEE Computer Society},
isbn = {0-7695-2500-8},
}