LPRAM: a novel low-power high-performance RAM design with testability and scalability

Subhasis Bhattacharjee, Dhiraj K. Pradhan. LPRAM: a novel low-power high-performance RAM design with testability and scalability. IEEE Trans. on CAD of Integrated Circuits and Systems, 23(5):637-651, 2004. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.