Techniques to Improve the Efficiency of SAT Based Path Delay Test Generation - researchr publication authors

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Kun Bian, D. M. H. Walker, Sunil P. Khatri. Techniques to Improve the Efficiency of SAT Based Path Delay Test Generation. In 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014. pages 50-55, IEEE, 2014. [doi]

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