Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs

Carsten Bieser, Klaus D. Müller-Glaser. Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs. In 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 14-16 June 2006, Chania, Crete, Greece. pages 193-199, IEEE Computer Society, 2006. [doi]

@inproceedings{BieserM06,
  title = {Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs},
  author = {Carsten Bieser and Klaus D. Müller-Glaser},
  year = {2006},
  doi = {10.1109/RSP.2006.32},
  url = {http://doi.ieeecomputersociety.org/10.1109/RSP.2006.32},
  tags = {design},
  researchr = {https://researchr.org/publication/BieserM06},
  cites = {0},
  citedby = {0},
  pages = {193-199},
  booktitle = {17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 14-16 June 2006, Chania, Crete, Greece},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2580-6},
}