A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks

Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi. A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks. Microelectronics Journal, 139:105867, September 2023. [doi]

@article{BiruduYV23,
  title = {A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks},
  author = {Venu Birudu and Siva Sankar Yellampalli and Ramesh Vaddi},
  year = {2023},
  month = {September},
  doi = {10.1016/j.mejo.2023.105867},
  url = {https://doi.org/10.1016/j.mejo.2023.105867},
  researchr = {https://researchr.org/publication/BiruduYV23},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {139},
  pages = {105867},
}