Parallel sparse polynomial multiplication on modern hardware architectures

Francesco Biscani. Parallel sparse polynomial multiplication on modern hardware architectures. In Joris van der Hoeven, Mark van Hoeij, editors, International Symposium on Symbolic and Algebraic Computation, ISSAC'12, Grenoble, France - July 22 - 25, 2012. pages 83-90, ACM, 2012. [doi]

Abstract

Abstract is missing.