A Multi-Standard Reconfigurable Viterbi Decoder using Embedded FPGA Blocks

Lucia Bissi, Pisana Placidi, Giuseppe Baruffa, Andrea Scorzoni. A Multi-Standard Reconfigurable Viterbi Decoder using Embedded FPGA Blocks. In Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia. pages 146-154, IEEE Computer Society, 2006. [doi]

@inproceedings{BissiPBS06,
  title = {A Multi-Standard Reconfigurable Viterbi Decoder using Embedded FPGA Blocks},
  author = {Lucia Bissi and Pisana Placidi and Giuseppe Baruffa and Andrea Scorzoni},
  year = {2006},
  doi = {10.1109/DSD.2006.12},
  url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2006.12},
  researchr = {https://researchr.org/publication/BissiPBS06},
  cites = {0},
  citedby = {0},
  pages = {146-154},
  booktitle = {Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2609-8},
}