On-chip inductance modeling

David Blaauw, Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Junfeng Wang. On-chip inductance modeling. In Majid Sarrafzadeh, Prithviraj Banerjee, Kaushik Roy, editors, Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000. pages 75-80, ACM, 2000. [doi]

@inproceedings{BlaauwGZPW00,
  title = {On-chip inductance modeling},
  author = {David Blaauw and Kaushik Gala and Vladimir Zolotov and Rajendran Panda and Junfeng Wang},
  year = {2000},
  doi = {10.1145/330855.330980},
  url = {http://doi.acm.org/10.1145/330855.330980},
  tags = {meta-model, modeling, Meta-Environment},
  researchr = {https://researchr.org/publication/BlaauwGZPW00},
  cites = {0},
  citedby = {0},
  pages = {75-80},
  booktitle = {Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000},
  editor = {Majid Sarrafzadeh and Prithviraj Banerjee and Kaushik Roy},
  publisher = {ACM},
  isbn = {1-58113-251-4},
}