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Andrea Boni, Andrea Pierazzi, Carlo Morandi. A 10-b 185-MS/s track-and-hold in 0.35-/spl mu/m CMOS. J. Solid-State Circuits, 36(2):195-203, 2001. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: LVDS I/O interface for Gb/s-per-pin operation in 0.35-/spl mu/m CMOSAndrea Boni, Andrea Pierazzi, Davide Vecchi. jssc, 36(4):706-711, 2001. [doi] 1.2-Gb/s true PECL 100K compatible I/O interface in 0.35-/spl mu/m CMOSAndrea Boni. jssc, 36(6):979-987, 2001. [doi]
The following publications are possibly variants of this publication: