Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures

Montserrat Bóo, Francisco Argüello, Javier D. Bruguera, Emilio L. Zapata. Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures. VLSI Signal Processing, 17(1):57-73, 1997. [doi]

@article{BooABZ97,
  title = {Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures},
  author = {Montserrat Bóo and Francisco Argüello and Javier D. Bruguera and Emilio L. Zapata},
  year = {1997},
  doi = {10.1023/A:1007949000569},
  url = {http://dx.doi.org/10.1023/A:1007949000569},
  tags = {architecture},
  researchr = {https://researchr.org/publication/BooABZ97},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {17},
  number = {1},
  pages = {57-73},
}