Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures

Montserrat Bóo, Francisco Argüello, Javier D. Bruguera, Emilio L. Zapata. Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures. VLSI Signal Processing, 17(1):57-73, 1997. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.