A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs

Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu. A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs. In Luc Bougé, Pierre Fraigniaud, Anne Mignotte, Yves Robert, editors, Euro-Par 96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume I. Volume 1123 of Lecture Notes in Computer Science, pages 828-831, Springer, 1996.

@inproceedings{BoppanaSBFL96,
  title = {A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs},
  author = {Vamsi Boppana and Prashant Saxena and Prithviraj Banerjee and W. Kent Fuchs and C. L. Liu},
  year = {1996},
  tags = {rule-based, C++},
  researchr = {https://researchr.org/publication/BoppanaSBFL96},
  cites = {0},
  citedby = {0},
  pages = {828-831},
  booktitle = {Euro-Par  96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume I},
  editor = {Luc Bougé and Pierre Fraigniaud and Anne Mignotte and Yves Robert},
  volume = {1123},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-61626-8},
}