Nirmal Kumar Boran, Dinesh Kumar Yadav, Rishabh Iyer. Performance Modelling and Dynamic Scheduling on Heterogeneous-ISA Multi-core Architectures. In Anirban Sengupta, Sudeb Dasgupta, Virendra Singh, Rohit Sharma, Santosh Kumar Vishvakarma, editors, VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers. Volume 1066 of Communications in Computer and Information Science, pages 702-715, Springer, 2019. [doi]
@inproceedings{BoranYI19,
title = {Performance Modelling and Dynamic Scheduling on Heterogeneous-ISA Multi-core Architectures},
author = {Nirmal Kumar Boran and Dinesh Kumar Yadav and Rishabh Iyer},
year = {2019},
doi = {10.1007/978-981-32-9767-8_58},
url = {https://doi.org/10.1007/978-981-32-9767-8_58},
researchr = {https://researchr.org/publication/BoranYI19},
cites = {0},
citedby = {0},
pages = {702-715},
booktitle = {VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers},
editor = {Anirban Sengupta and Sudeb Dasgupta and Virendra Singh and Rohit Sharma and Santosh Kumar Vishvakarma},
volume = {1066},
series = {Communications in Computer and Information Science},
publisher = {Springer},
isbn = {978-981-32-9767-8},
}