Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA - researchr publication authors

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Sophie Bouchoux, El-Bay Bourennane, Johel Mitéran, Michel Paindavoine. Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA. In 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA. pages 237-238, IEEE Computer Society, 2004. [doi]

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