Sophie Bouchoux, El-Bay Bourennane, Johel Mitéran, Michel Paindavoine. Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA. In 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA. pages 237-238, IEEE Computer Society, 2004. [doi]
@inproceedings{BouchouxBMP04,
title = {Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA},
author = {Sophie Bouchoux and El-Bay Bourennane and Johel Mitéran and Michel Paindavoine},
year = {2004},
url = {http://csdl.computer.org/comp/proceedings/isvlsi/2004/2097/00/20970237abs.htm},
researchr = {https://researchr.org/publication/BouchouxBMP04},
cites = {0},
citedby = {0},
pages = {237-238},
booktitle = {2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-2097-9},
}