A clock-less low-voltage AES crypto-processor

G. Fraidy Bouesse, Marc Renaudin, Adrien Witon, Fabien Germain. A clock-less low-voltage AES crypto-processor. In Laurent Fesquet, Andreas Kaiser, Sorin Cristoloveanu, Michel Brillouët, editors, Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005. pages 403-406, IEEE, 2005. [doi]

@inproceedings{BouesseRWG05,
  title = {A clock-less low-voltage AES crypto-processor},
  author = {G. Fraidy Bouesse and Marc Renaudin and Adrien Witon and Fabien Germain},
  year = {2005},
  doi = {10.1109/ESSCIR.2005.1541645},
  url = {https://doi.org/10.1109/ESSCIR.2005.1541645},
  researchr = {https://researchr.org/publication/BouesseRWG05},
  cites = {0},
  citedby = {0},
  pages = {403-406},
  booktitle = {Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005},
  editor = {Laurent Fesquet and Andreas Kaiser and Sorin Cristoloveanu and Michel Brillouët},
  publisher = {IEEE},
  isbn = {0-7803-9205-1},
}