Table of Contents

• "Silicon forever! Really?"Horst L. Stormer. 3-6 [doi]
• Future devices for information processingRalph K. Cavin III, Victor V. Zhirnov. 7-12 [doi]
• Terahertz technology: devices and applicationsMichael S. Shur. 13-21 [doi]
• Silicon nano-photonics: where the photons meet the electronsEli Yablonovitch. 23-25 [doi]
• Towards a molecule - computer? Resources and technologies to compute within a single moleculeChristian Joachim. 27-28 [doi]
• Engineering wafers for the nanotechnology eraCarlos Mazure, Andre-Jacques Auberton-Herve. 29-38 [doi]
• Digital control of RF power amplifiers for next-generation wireless communicationsLawrence E. Larson, Peter M. Asbeck, Donald F. Kimball. 39-44 [doi]
• Analog/RF circuit design techniques for nanometerscale IC technologiesBram Nauta, Anne-Johan Annema. 45-53 [doi]
• Nanoelectronics: nanotubes, nanowires, molecules, and novel conceptsH.-S. Philip Wong. 55-61 [doi]
• Pushing CMOS beyond the roadmapLothar Risch. 63-68 [doi]
• Smart cards insideBerndt M. Gammel, Stefan J. Ruping. 69-74 [doi]
• A PMOS-switch based charge pump, allowing lost cost implementation on a CMOS standard processEmmanuel Racape, Jean Michel Daga. 77-80 [doi]
• A PWM dual-output DC/DC boost converter in a 0.13μm CMOS technology for cellularphone backlight applicationSiew Kuok Hoon, Norm Culp, Jun Chen, Franco Maloberti. 81-84 [doi]
• A new integrated charge pump architecture using dynamic biasing of pass transistorsLuca Mensi, Luigi Colalongo, Anna Richelli, Zsolt Miklós Kovács-Vajna. 85-88 [doi]
• 24 GHz LNA in 90nm RF-CMOS with high-Q above-IC inductorsOlivier Dupuis, Xiao Sun, Geert Carchon, Philippe Soussan, Mattias Ferndahl, Stefaan Decoutere, Walter De Raedt. 89-92 [doi]
• T SiGe HBTsFernando Fortes, J. Costa Freire, Domine Leenaerts, Reza Mahmoudi, Arthur H. M. van Roermund. 93-96 [doi]
• Notice of Violation of IEEE Publication PrinciplesA 12.5GHz SiGe BICMOS limiting amplifier using a dual offset cancellation loopA. Maxim, D. Antrik. 97-100 [doi]
• GMSK modulation of subharmonic injection locked oscillatorsThomas Finateu, Jean-Baptiste Bégueret, Yann Deval, Franck Badets. 101-104 [doi]
• Phase noise degradation of LC-tank VCOs due to substrate noise and package couplingMiguel A. Méndez, Diego Mateo, Xavier Aragonès, José Luis González 0001. 105-108 [doi]
• A 34GHz/1V prescaler in 90nm CMOS SOIMihai A. T. Sanduleanu, Razvan Ionita, Andrei Vladimirescu. 109-112 [doi]
• Continuous-time DSPs, analog/digital computers and other mixed-domain circuitsYannis P. Tsividis, Glenn E. R. Cowan, Yee William Li, Kenneth L. Shepard. 113-116 [doi]
• A reconfigurable VLSI learning arraySeth Bridges, Miguel E. Figueroa, David Hsu, Chris Diorio. 117-120 [doi]
• A real-time image-feature-extraction and vector-generation VLSI employing arrayed-shift-register architectureHideo Yamasaki, Tadashi Shibata. 121-124 [doi]
• A high-speed median filter VLSI using floating-gate-MOS-based low-power majority voting circuitsHideo Yamasaki, Tadashi Shibata. 125-128 [doi]
• A low-power high-performance SiGe BiCMOS 802.11a/b/g transceiver IC for cellular and Bluetooth co-existence applicationsOlivier Charlon, Matthias Locher, Henk Visser, David Duperray, J. Cherr, Marc Judson, Alan L. Landesman, C. Hritz, Ulrich Kohlschuetter, Yifeng Zhang, C. Ramesh, Anton Daanen, Minzhan Gao, S. Haas, Vijay Maheshwari, Andreas Bury, Gunnar Nitsche, Artur Wrzyszcz, William Redman-White, Hamid Bonakdar, Rachid El Waffaoui, Mark Bracey. 129-132 [doi]
• 17 GHz receiver in TSLP package for WLAN/ISM applications in 0.13 μm CMOSChristoph Kienmayer, Mario Engl, Aandreas Desch, Ronald Thüringer, Mohit Berry, Marc Tiebout, Arpad L. Scholtz, Robert Weigel. 133-136 [doi]
• An 18-GHz, 10.9-dBm fully-integrated power amplifier with 23.5% PAE in 130-nm CMOSChanghua Cao, Haifeng Xu, Yu Su, Kenneth K. O. 137-140 [doi]
• SiGe transformer matched power amplifier for operation at millimeter-wave frequenciesUllrich R. Pfeiffer, David Goren, Brian A. Floyd, Scott K. Reynolds. 141-144 [doi]
• Dynamic state-retention flip flop for fine-grained sleep-transistor schemeStephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel. 145-148 [doi]
• Isodelay output driver design using step-wise charging for low powerAtul Katoch, Harry J. M. Veendrick. 149-152 [doi]
• Low leakage design of LUT-based FPGAsAndrea Lodi 0002, Luca Ciccarelli, Domenico Loparco, Roberto Canegallo, Roberto Guerrieri. 153-156 [doi]
• An on-chip jitter measurement circuit with sub-picosecond resolutionKeith A. Jenkins, Anup P. Jose, David F. Heidel. 157-160 [doi]
• A 15-bit 30 MS/s 145 mW three-step ADC for imaging applicationsHendrik van der Ploeg, Maarten Vertregt, Marco Lammers. 161-164 [doi]
• A 220mW 14b 40MSPS gain calibrated pipelined ADCJohnny Bjørnsen, Øystein Moldsvor, Trond Sæther, Trond Ytterdal. 165-168 [doi]
• An on-chip self-calibration method for current mismatch in D/A convertersGeorgi I. Radulov, Patrick J. Quinn, Hans Hegt, Arthur H. M. van Roermund. 169-172 [doi]
• A fast-hopping single-PLL 3-band UWB synthesizer in 0.25μm SiGe BiCMOSRemco van de Beek, Domine Leenaerts, Gerard Van der Weide. 173-176 [doi]
• Multistandard carrier generation system for quad-band GSM/WCDMA (FDD-TDD)/WLAN (802.11 a-b-g) radioAdil Koukab, Yu Lei, Michel J. Declercq. 177-180 [doi]
• Fast AFC technique using a code estimation and binary search algorithm for wideband frequency synthesisKun-Seok Lee, Eun-yung Sung, In-Chul Hwang, Byeong-ha Park. 181-184 [doi]
• A novel 40-GHz flip-flop-based frequency divider in 0.18μm CMOSRavindran Mohanavelu, Payam Heydari. 185-188 [doi]
• A fast-lock mixed-mode DLL with wide-range operation and multiphase outputsKuo-Hsing Cheng, Yu-lung Lo. 189-192 [doi]
• A multichannel 3.5mW/Gbps/channel gated oscillator based CDR in a 0.18μm digital CMOS technologyArmin Tajalli, Paul Muller, Mojtaba Atarodi, Yusuf Leblebici. 193-196 [doi]
• Design for manufacturing in the nanoscale eraClive Bittlestone. 197-198 [doi]
• A 2GHz 13.6mW 12 × 9b multiplier for energy efficient FFT acceleratorsSteven Hsu, Vishak Venkatraman, Sanu Mathew, Himanshu Kaul, Mark A. Anders 0001, Saurabh Dighe, Wayne P. Burleson, Ram Krishnamurthy 0001. 199-202 [doi]
• The vector fixed point unit of the synergistic processor element of the cell architecture processorNicolas Mäding, Jens Leenstra, Jürgen Pille, Rolf Sautter, Stefan Büttner, Sebastian Ehrenreich, W. Haller. 203-206 [doi]
• A fixed-point multimedia coprocessor with 50Mvertices/s programmable SIMD vertex shader for mobile applicationsJu-Ho Sohn, Jeong-Ho Woo, Ramchan Woo, Hoi-Jun Yoo. 207-210 [doi]
• A 3.33Gb/s (1200,720) low-density parity check code decoderChien-Ching Lin, Kai-Li Lin, Hsie-Chia Chang, Chen-Yi Lee. 211-214 [doi]
• ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANsDavid Perels, Simon Haene, Peter Luethi, Andreas Peter Burg, Norbert Felber, Wolfgang Fichtner, Helmut Bölcskei. 215-218 [doi]
• ESD-protected CMOS 3-5 GHz wideband LNA+PGA design for UWBRaffaele Salerno, Marc Tiebout, Herrmann Paule, Martin Streibl, Christoph Sandner, Klaus Kropf. 219-222 [doi]
• A 5-GHz BiCMOS variable-gain low noise amplifier with inductorless low-gain branchMingxu Liu, Jan Craninckx. 223-226 [doi]
• A cellular-band CDMA 0.25μm CMOS LNA linearized using active post-distortionNamsoo Kim, Vladimir Aparin, Kenneth Barnett, Charles J. Persico. 227-230 [doi]
• IP2 calibrator using common mode feedback circuitryWoonyun Kim, Sung-Gi Yang, Yeon-Kug Moon, Jinhyuck Yu, Heeseon Shin, Woo-Seung Choo, Byeong-ha Park. 231-234 [doi]
• A modified LMS adaptive filter architecture with improved stability at RFVladimir Aparin. 235-238 [doi]
• Antenna and input stages of a 470-710 MHz silicon TV tuner for portable applicationsVincent Rambeau, Hans Brekelmans, Marc Notten, Kevin Boyle, Jan van Sinderen. 239-242 [doi]
• CAFFEINE: template-free symbolic model generation of analog circuits via canonical form functions and genetic programmingTrent McConaghy, Tom Eeckelaert, Georges G. E. Gielen. 243-246 [doi]
• T processAgnese Bargagli-Stoffi, Jens Sauerbrey, Roland Thewes, Doris Schmitt-Landsiedel. 247-250 [doi]
• T and 128 dB DC gainFranz Schlögl, Horst Zimmermann. 251-254 [doi]
• A 1 watt audio amplifier in a standard digital 90-nm CMOS technologyRolf Becker, Willem H. Groeneweg. 255-258 [doi]
• 100-MS/s 14-b track-and-hold amplifier in 0.18-μm CMOSDavide Vecchi, Cristiano Azzolini, Andrea Boni, Faouzi Chaahoub, Lorenzo Crespi. 259-262 [doi]
• A low-power, 10GS/s track-and-hold amplifier in SiGe BiCMOS technologyYevgen Borokhovych, Hans Gustat, Bernd Tillack, Bernd Heinemann, Yuan Lu, Wei-Min Lance Kuo, Xiangtao Li, Ramkumar Krithivasan, John D. Cressler. 263-266 [doi]
• A novel UWB impulse-radio transmitter with all-digitally-controlled pulse generatorTakayasu Norimatsu, Ryosuke Fujiwara, Masaru Kokubo, Masayuki Miyazaki, Yasuyuki Ookuma, Miki Hayakawa, Shinsuke Kobayashi, Noboru Koshizuka, Ken Sakamura. 267-270 [doi]
• Single-chip CMOS pulse generator for UWB systemsLydi Smaini, Carlo Tinella, Didier Helal, Claude Stoecklin, Laurent Chabert, Christophe Devaucelle, Régis Cattenoz, Didier Belot. 271-274 [doi]
• 15-27 GHz pseudo-noise UWB transmitter for short-range automotive radar in a production SiGe technologyHugo Veenstra, Edwin van der Heijden, Dave van Goor. 275-278 [doi]
• A 5.1-μW UHF RFID tag chip integrated with sensors for wireless environmental monitoringNamjun Cho, Seong-Jun Song, Sunyoung Kim, Shiho Kim, Hoi-Jun Yoo. 279-282 [doi]
• A high accurate logarithmic amplifier system with wide input range and extreme low temperature coefficientStefan Groiss, Michael Koeberle. 283-286 [doi]
• A BiCMOS ultrasound front end signal processor for high temperature applicationsOvidiu Vermesan, Lars-Cyril Julin Blystad, Roy Bahr, Magnus Hjelstuen, Lionel Beneteau, Benoit Froelich. 287-290 [doi]
• Implementing multi-gigahertz test systems using CMOS FPGAs and PECL componentsDavid C. Keezer, Carl Gray, Ashraf Majid, Nafeez Taher. 291-294 [doi]
• An on-chip multi-channel waveform monitor for mixed-signal VLSI diagnosticsKoichiro Noguchi, Makoto Nagata. 295-298 [doi]
• Memory testing improvements through different stress conditionsAnanta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen. 299-302 [doi]
• A 5.5 V SOPA line driver in a standard 1.2 V 0.13 μm CMOS technologyBert Serneels, Michiel Steyaert, Wim Dehaene. 303-306 [doi]
• Silicon bipolar circuits for wideband FM CATV transmissionRoberto Rosales, Mike K. Jackson. 307-310 [doi]
• 4-FETs) for high voltage analog applicationsSuheng Chen, James Vandersand, Benjamin J. Blalock, Kerem Akarvardar, Sorin Cristoloveanu, Mohammad M. Mojarradi. 311-314 [doi]
• m-RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic toolStefano D'Amico, Vito Giannini, Andrea Baschirotto. 315-318 [doi]
• A 43dB ACR low-pass filter with automatic tuning for low-IF conversion DAB/T-DMB tuner ICSeyeob Kim, Bonkee Kim, Minsu Jeong, Junghwan Lee, Youngho Cho, Tae-Wook Kim, Boeun Kim. 319-322 [doi]
• Ultra low-power analog Morlet wavelet filter in 0.18 μm BiCMOS technologySandro A. P. Haddad, Joël M. H. Karel, Ralf L. M. Peelers, Ronald L. Westra, Wouter A. Serdijn. 323-326 [doi]
• A 1.2-V CMOS complex bandpass filter with a tunable center frequencyHideaki Majima, Hiroki Ishikuro, Kenichi Agawa, Mototsugu Hamada. 327-330 [doi]
• m-C filter based on subthreshold MIFG MOS transistorsAimad El Mourabit, Guo-Neng Lu, Patrick Pittet. 331-334 [doi]
• CMOS microelectrode array for bidirectional interaction with neuronal networksFlavio Heer, Sadik Hafizovic, Wendy Franks, Tanja Ugniwenko, Axel W. Blau, Christiane Ziegler, Andreas Hierlemann. 335-338 [doi]
• All CMOS low power platform for dielectrophoresis bio-analysisAli Enteshari, Graham A. Jullien, Orly Yadid-Pecht, Karan V. I. S. Kaler. 339-342 [doi]
• A CMOS-based sensor array system for chemical and biochemical applicationsMartin Zimmermann 0003, Tormod Volden, Kai-Uwe Kirstein, Sadik Hafizovic, Jan Lichtenberg, Andreas Hierlemann. 343-346 [doi]
• Electrical measurement of alignment for 3D stacked chipsRoberto Canegallo, Mauro Mirandola, Alberto Fazzi, Luca Magagni, Roberto Guerrieri, Karin Kaschlun. 347-350 [doi]
• A 0.1% accuracy 100Ω-20MΩ dynamic range integrated gas sensor interface circuit with 13+4 bit digital outputMarco Grassi, Piero Malcovati, Andrea Baschirotto. 351-354 [doi]
• A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applicationsDinesh Somasekhar, Shih-Lien Lu, Bradley A. Bloechel, Greg Dermer, Konrad Lai, Sjeljar Borkar, Vivek De. 355-358 [doi]
• A 8Kb domino read SRAM with hit logic and parity checkerAntonio Pelella, Arthur Tuminaro, Ryan T. Freese, Yuen H. Chan. 359-362 [doi]
• Analyzing static noise margin for sub-threshold SRAM in 65nm CMOSBenton H. Calhoun, Anantha P. Chandrakasan. 363-366 [doi]
• A precision high voltage wave-shaper for multi-Gbit source side injection MLC NOR flash memoryHieu Van Tran, William John Saiki, Jack Edward Frayer, Thuan Vu, Anh Ly, Sang Thanh Nguyen, Hung Quoc Nguyen, Douglas James Lee, Michael Stephen Briner. 367-370 [doi]
• A novel circuit topology for generating and validating digitally sense amplifier differentials for bulk and SOIRajiv V. Joshi, Yuen H. Chan. 371-374 [doi]
• A 0.18μm CMOS switched capacitor voltage modulatorKoen Cornelissens, Patrick Reynaert, Michiel Steyaert. 375-378 [doi]
• A 1.2V CMOS multiplier for 10 Gbit/s equalizationJustin P. Abbott, Calvin Plett, John W. M. Rogers. 379-382 [doi]
• Realization of a simple high-value grounded linear resistance in CMOS technologyPeter J. Langlois, John Taylor 0002, Andreas Demosthenous. 383-386 [doi]
• A 100 μW, 1.9GHz oscillator with fully digital frequency tuningNathan Pletcher, Jan M. Rabaey. 387-390 [doi]
• Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCOXiaoyan Wang, Ali Fard, Pietro Andreani. 391-394 [doi]
• A low-power 5 GHz CMOS LC-VCO optimized for high-resistivity SOI substratesPierre Delatte, Gonzalo Picun, Laurent Demeus, Pascal Simon, Denis Flandre. 395-398 [doi]
• Physical random number generators for cryptographic application in mobile devicesShinichi Yasuda, Tetsufumi Tanamoto, Ryuji Ohba, Keiko Abe, Hanae Nozaki, Shinobu Fujita. 399-402 [doi]
• A clock-less low-voltage AES crypto-processorG. Fraidy Bouesse, Marc Renaudin, Adrien Witon, Fabien Germain. 403-406 [doi]
• Improving DPA security by using globally-asynchronous locally-synchronous systemsFrank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner. 407-410 [doi]
• A cyclic A/D converter with pixel noise and column-wise offset canceling for CMOS image sensorsMasanori Furuta, Shoji Kawahito, Toru Inoue, Yukinari Nishikawa. 411-414 [doi]
• A high dynamic range, high linearity CMOS current-mode image sensor for computed tomographyRoger Steadman, Gereon Vogtmeier, Armin Kemna, Salah Eddine Ibnou Quossai, Bedrich J. Hosticka. 415-418 [doi]
• A 35nW/pixel 2D visual motion sensorGuangbin Zhang, Hoi Lee, Jin Liu. 419-422 [doi]
• Digital communication systems: the problem of analog interface circuitsMichiel Steyaert, Frederique Gobert, Carolien Hermans, Patrick Reynaert, Bert Serneels. 423-426 [doi]
• A 10Gb/s, 3.3V, laser/modulator driver with high power efficiencyMihai A. T. Sanduleanu, Eduard Stikvoort. 427-430 [doi]
• A 3.5Gbit/s post-amplifier in 0.18μm CMOSCarolien Hermans, Michiel Steyaert. 431-434 [doi]
• An integrated optical receiver with wide-range timing discrimination characteristicsSami Kurtti, Juha Kostamovaara. 435-438 [doi]
• A programmable OEIC for laser applications in the range from 405nm to 780nmChristophe Seidl, Harald Schatzmayr, Johannes Sturm, Stefan Groiß, Martin Leifhelm, D. Spitzer, H. Schaunig, Horst Zimmermann. 439-442 [doi]
• A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offsetVincent Quiquempoix, Philippe Deval, Alexandre Barreto, Gabriele Bellini, Jerry Collings, János Márkus, José B. Silva, Gabor C. Temes. 443-446 [doi]
• A time-interleaved continuous-time ΔΣ modulator with 20MHz signal bandwidthTrevor C. Caldwell, David A. Johns. 447-450 [doi]
• A 10mW 81dB cascaded multibit quadrature ΣΔ ADC with a dynamic element matching schemeRoberto Maurino, Christos Papavassiliou. 451-454 [doi]
• A 75dB image rejection IF-input quadrature sampling SC ΣΔ modulatorWang Tung Cheng, Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan. 455-458 [doi]
• An audio FIR-DAC in a BCD process for high power class-D amplifiersT. S. Doorn, Ed van Tuijl, Daniël Schinkel, Anne-Johan Annema, Marco Berkhout, Bram Nauta. 459-462 [doi]
• Scalable circuits for supply noise measurementValentin A. Abramzon, Elad Alon, Bita Nezamfar, Mark Horowitz. 463-466 [doi]
• Autonomous di/dt noise control scheme for margin aware operationToru Nakura, Makoto Ikeda, Kunihiro Asada. 467-470 [doi]
• DDQ testing circuitSotirios Matakias, Yiorgos Tsiatouhas, Angela Arapoyanni, Th. Haniotakis, Guillaume Prenat, Salvador Mir. 471-474 [doi]
• Optimally-placed twists in global on-chip differential interconnectsEisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta. 475-478 [doi]
• Analysis of low noise three-phase asynchronous data transmissionNan Li, Makoto Ikeda, Kunihiro Asada. 479-482 [doi]
• Differential image sensor with high common mode rejectionManuel Innocent, Guy Meynants. 483-486 [doi]
• A single-photon-avalanche-diode 3D imagerDavid Stoppa, Lucio Pancheri, Mauro Scandiuzzo, Mattia Malfatti, Gianmaria Pedretti, Lorenzo Gonzo. 487-490 [doi]
• Correlating PIN-photodetector with novel difference-integrator concept for range-finding applicationsAlexander Nemecek, Klaus Oberhauser, Horst Zimmermann. 491-494 [doi]
• A novel current-mode very low power analog CMOS four quadrant multiplierMirko Gravati, Maurizio Valle, Giuseppe Ferri, Nicola Carlo Guerrini, Linder Reyes. 495-498 [doi]
• 4-FETs)Kerem Akarvardar, Suheng Chen, Benjamin J. Blalock, Sorin Cristoloveanu, Pierre Gentil, Mohammad M. Mojarradi. 499-502 [doi]
• A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technologyAlessandro Cabrini, Guido De Sandre, Laura Gobbi, Piero Malcovati, Marco Pasotti, Marco Poles, F. Rigoni, Guido Torelli. 503-506 [doi]
• A low-power 2-GSample/s comparator in 120 nm CMOS technologyBernard Goll, Horst Zimmermann. 507-510 [doi]
• Variable gain amplifier in polar loop modulation transmitter for EDGEMasahiro Ito, Taizo Yamawaki, Masumi Kasahara, Steve Williams. 511-514 [doi]
• WCDMA multicarrier receiver for base-station applicationsJussi Ryynänen, Mikko Hotti, Ville Saari, Jarkko Jussila, Arto Malinen, Lauri Sumanen, Tero Tikka, Kari Halonen. 515-518 [doi]
• Fully-integrated WCDMA SiGeC BiCMOS transceiverBruno Pellat, Jean-Pierre Blanc, Franck Goussin, Davy Thevenet, Sandrine Majcherczak, Fabien Reaute, Didier Belot, Patrice Garcia, Pascal Persechini, Patrick Cerisier, Patrick Conti, Philippe Level, Michael Kraemer, Angelo Granata. 519-522 [doi]
• A 10BIT 30MSPS CMOS A/D converter for high performance video applicationsJian Li, Jianyun Zhang, Bo Shen, Xiaoyang Zeng, Yawei Guo, Tingao Tang. 523-526 [doi]
• 55-mW 200-MSPS 10-bit pipeline ADCs for wireless receiversDaisuke Kurose, Tomohiko Ito, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura. 527-530 [doi]
• Offset and dynamic gain-mismatch reduction techniques for 10b 200ms/s parallel pipeline ADCsSeung-Chul Lee, Gyu-Hyun Kim, Jong-Kee Kwon, Jongdae Kim, Seung-Hoon Lee. 531-534 [doi]
• A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOSCharles T. Peach, Ashoke Ravi, Rosie Bishop, Krishnamurthy Soumyanath, David J. Allstot. 535-538 [doi]