Cheong-fat Chan - researchr alias

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Viewing Publication 1 - 59 from 59

2009

A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma ModulatorsBing Li, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy. iscas 2009: 1545-1548 [doi]

2008

Enhanced channel selection using digital low-IF in Weaver receiver architectureMisteltein Pak-Kee Chan, Oliver Chiu-sing Choy, Kong-Pang Pun, Cheong-fat Chan, Alex Ka-Nang Leung. apccas 2008: 33-36 [doi]

A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB ReceiversSiu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan, Ka Nang Leung. tcas, 55-II(7):653-657, 2008. [doi]

2007

2006

A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithmChi-Hong Chan, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun. iscas 2006: [doi]

0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN ApplicationWang-Chi Cheng, Cheong-fat Chan, Suyi Tao, King-Keung Mok. apccas 2006: 25-28 [doi]

0.8 V GPS band CMOS VCO with 29 Tuning RangeWang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy. apccas 2006: 522-525 [doi]

Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS SystemWang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy. apccas 2006: 195-198 [doi]

An efficient MFCC extraction method in speech recognitionWei Han, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun. iscas 2006: [doi]

A 0.5V fully differential OTA with local common feedbackXiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan. iscas 2006: [doi]

An optimal normal basis elliptic curve cryptoprocessor for inductive RFID applicationPak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. iscas 2006: [doi]

Adiabatic Smart CardKing-Keung Mok, Ka-Hung Tsang, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun. apccas 2006: 287-290 [doi]

A 75-dB image rejection IF-input quadrature-sampling SC /spl Sigma//spl Delta/ ModulatorKong-Pang Pun, Wang Tung Cheng, Chiu-sing Choy, Cheong-fat Chan. jssc, 41(6):1353-1363, 2006. [doi]

A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applicationsSiu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan. iscas 2006: [doi]

Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoderKe Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun. iscas 2006: [doi]

2005

2004

An asynchronous SOVA decoder for wireless communication applicationWing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. iscas 2004: 517-520

Card-Centric Framework - Providing I/O Resources for Smart CardsPak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. cardis 2004: 225-240

Preparing smartcard for the future: from passive to activePak-Kee Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. tce, 50(1):245-250, 2004. [doi]

A low-latency asynchronous shift registerRagnarok Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. tcas, 51-II(5):217-221, 2004. [doi]

An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharingWang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy. iscas 2004: 1140-1143 [doi]

An I/Q mismatch-free switched-capacitor complex sigma-delta ModulatorKong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José Epifânio da Franca. tcas, 51-II(5):254-256, 2004. [doi]

An IF input continuous-time sigma-delta analog-digital converter with high image rejectionJunhua Shen, Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan. icecsys 2004: 101-104 [doi]

High Speed Curve Interpolating D/A ConverterHongwei Wang, Cheong-fat Chan, Chiu-sing Choy. vlsisp, 38(1):5-11, 2004. [doi]

A high-efficiency strongly self-checking asynchronous datapathJing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun. tcad, 23(10):1484-1494, 2004. [doi]

Pipelines in Dynamic Dual-Rail CircuitsJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun. patmos 2004: 701-710 [doi]

A low power asynchronous Java processor for contactless smart cardChun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun. aspdac 2004: 553-554 [doi]

2003

2002

A 1.2 V 900 MHz CMOS mixerWang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun. iscas 2002: 365-368 [doi]

A 900 MHz 1.2 V CMOS mixer with high linearityWang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun. apccas 2002: 1-4 [doi]

A CMOS current feedback operational amplifier with active current mode compensationKin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun. iscas 2002: 709-712 [doi]

A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulatorsKong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca. iscas 2002: 221-224 [doi]

A 12-bit 80 Ms/s 110 mW floating analog-to-digital converterHongwei Wang, Cheong-fat Chan, Chiu-sing Choy. iscas 2002: 137-140 [doi]

A Totally Self-Checking Dynamic Asynchronous DatapathJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun. ats 2002: 27-32 [doi]

2001

Asynchronous cross-pipelined multiplierJan Butas, Chiu-sing Choy, Juraj Povazanec, Cheong-fat Chan. jssc, 36(8):1272-1275, 2001. [doi]

A New Control Circuit for Asynchronous MicropipelinesOliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-fat Chan. TC, 50(9):992-997, 2001. [doi]

A pipelined dataflow small micro-coded asynchronous processor and its application to DCTChi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan. iscas 2001: 910-913 [doi]

A giga-hertz CMOS digital controlled oscillatorLai-Kan Leung, Cheong-fat Chan, Oliver Chiu-sing Choy. iscas 2001: 610-613 [doi]

A low power asynchronous DESPui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan. iscas 2001: 538-541 [doi]

A self-timed divider using a new fast and robust pipeline schemeJing-ling Yang, Chiu-sing Choy, Cheong-fat Chan. jssc, 36(6):917-923, 2001. [doi]

2000

An ALU design using a novel asynchronous pipeline architectureTin-Yau Tang, Chiu-sing Choy, Jan Butas, Cheong-fat Chan. iscas 2000: 361-364 [doi]

CMOS high speed interpolators based on parallel architectureHong-Wei Wang, Cheong-fat Chan, Chiu-sing Choy. tce, 46(2):326-329, 2000. [doi]

High speed CMOS digital-to-analog converter with linear interpolatorHong-Wei Wang, Cheong-fat Chan, Chiu-sing Choy. tce, 46(4):1137-1142, 2000. [doi]

1999

1998

A Useful Micropipeline Architecture to Implement DSP AlgorithmsOliver Chiu-sing Choy, Tin-chak Pang, Juraj Povazanec, Cheong-fat Chan. euromicro 1998: 10212 [doi]

Asynchronous logic in bit-serial arithmeticJuraj Povazanec, Chiu-sing Choy, Cheong-fat Chan. icecsys 1998: 175-178 [doi]

1997

Self-timed 1-D ICT processorTin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-fat Chan, Wai-kuen Cham. aspdac 1997: 669-670 [doi]

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