Table of Contents

• A matched biphasic microstimulator for an implantable retinal prosthetic devicePraveen R. Singh, Wentai Liu, Mohanasankar Sivaprakasam, Mark S. Humayun, James D. Weiland. 1-4
• Digital error correction and calibration of gain non-linearities in a pipelined ADCArun Ravindran, Anup Savla, Jennifer Leonard. 1-4 [doi]
• An analog CMOS chip implementing a CNN-based locomotion controller for quadruped walking robotsKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. 1-4 [doi]
• A stenographic framework for dual authentication and compression of high resolution imageryDeepa Kundur, Yang Zhao, Patrizio Campisi. 1-4
• Frequency domain blind source separation using small and large spacing sensor pairsRyo Mukai, Hiroshi Sawada, Shoko Araki, Shoji Makino. 1-4
• Gradient flow bearing estimation with blind identification of multiple signals and interferenceMilutin Stanacevic, Gert Cauwenberghs, Laurence Riddle. 5-8
• A biomimetic VLSI architecture for small target trackingVivek Pant, Charles M. Higgins. 5-8 [doi]
• Content-based image retrieval with automated relevance feedback over distributed peer-to-peer networkIvan Lee, Ling Guan. 5-8
• A new digital background calibration technique for pipelined ADCKamal El-Sankary, Mohamad Sawan. 5-8 [doi]
• Low-power implantable microsystem intended to multichannel cortical recordingBenoit Gosselin, Virginie Simard, Mohamad Sawan. 5-8
• A unified framework for similarity calculation between imagesAzadeh Kushki, Panagiotis Androutsos, Konstantinos N. Plataniotis, Anastasios N. Venetsanopoulos. 9-12
• Design of a low-power, implantable electromyogram amplifierRavi S. Ananth, Edward K. Lee. 9-12
• A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADCTae-Hwan Oh, Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim. 9-12 [doi]
• Nonlinear ICA solutions for convolutive mixing of PNL mixturesDaniele Vigliano, Aurelio Uncini, Raffaele Parisi. 9-12
• Analog integrated 2-D optical flow sensor with programmable pixelsAlan A. Stocker, Rodney J. Douglas. 9-12 [doi]
• Digital background auto-calibration of DAC non-linearity in pipelined ADCsMartin Kinyua, Franco Maloberti, William Gosney. 13-16 [doi]
• Blind separation with Gaussian mixture model for convolutively mixed sourcesMasashi Ohata, Toshiharu Mukai, Kiyotoshi Matsuoka. 13-16
• A wavelet based R-wave detector for cardiac pacemakers in 0.35 CMOS technologyJoachim Neves Rodrigues, Viktor Öwall, Leif Sörnmo. 13-16
• A multi-chip implementation of cortical orientation hypercolumnsThomas Y. W. Choi, Bertram Emil Shi, Kwabena Boahen. 13-16 [doi]
• An efficient transmission framework of digital multimedia broadcasting (DMB) systemsBong-Ho Lee, So Ra Park, Young Kwon Hahm, Soo-in Lee. 13-16
• A scalable video transmission system using bandwidth inference in congestion controlQiang Liu, Jenq-Neng Hwang. 17-20
• A closed loop transcutaneous power transfer system for implantable devices with enhanced stabilityGuoxing Wang, Wentai Liu, Rizwan Bashirullah, Mohanasankar Sivaprakasam, Gurhan Alper Kendir, Ying Ji, Mark S. Humayun, James D. Weiland. 17-20
• An artificial immune system for visual applications with CNN-UMGyörgy Cserey, András Falus, Wolfgang Porod, Tamás Roska. 17-20 [doi]
• Correlation-based watermarking for halftone imagesMing Sun Fu, Oscar C. Au. 21-24
• High density VLSI implementation of a bipolar CNN with reduced programmabilityAri Paasio, Jacek Flak, Mika Laiho, Kari Halonen. 21-24 [doi]
• New algorithm for blind adaptive equalization based on constant modulus criterionYajun Kou, Wu-Sheng Lu, Andreas Antoniou. 21-24
• On designing linearly tunable high-Q OTA-C filters with low sensitivityJader A. De Lima, Fernando M. Alcaide. 21-24 [doi]
• A low noise CMOS amplifier for ENG signalsArantxa Uranga, Natalia Lago, Xavier Navarro, Nuria Barniol. 21-24
• CDMA-based watermarking resisting to croppingYanmei Fang, Jiwu Huang, Shaoquan Wu. 25-28
• Integrated multi-electrode fluidic nitric-oxide sensor and VLSI potentiostat arrayMihir Naware, Abhishek Rege, Roman Genov, Milutin Stanacevic, Gert Cauwenberghs, Nitish Thakor. 25-28
• On the implementation of RTD based CNNsSing-Rong Li, Pinaki Mazumder, Leon O. Chua. 25-28 [doi]
• Exact design of all-MOS log filtersFrancisco Serra-Graells, Xavier Redondo. 25-28 [doi]
• Adaptive log domain filters using floating gate transistorsPamela Abshire, Eric Liu Wong, Yiming Zhai, Marc H. Cohen. 29-32 [doi]
• A vertical layered space-time code and its blind symbol detectionKe Deng, Qinye Yin, Ming Luo, Zheng Zhao. 29-32
• A low-power CMOS neural amplifier with amplitude measurements for spike sortingTimothy K. Horiuchi, Thomas Swindell, David Sander, Pamela Abshire. 29-32
• High capacity lossless data hiding based on integer wavelet transformGuorong Xuan, Yun Q. Shi, Zhicheng Ni, Jidong Chen, Chengyun Yang, Yizhan Zhen, Junxiang Zheng. 29-32
• A simplicial CNN architecture for on-chip image processingPablo Sergio Mandolesi, Pedro Julián, Andreas G. Andreou. 29-32 [doi]
• A fully programmable log-domain bandpass filter using multiple-input translinear elementsRavi Chawla, Haw-Jing Lo, Arindam Basu, Paul E. Hasler, Bradley A. Minch. 33-36 [doi]
• Blind source recovery for non-minimum phase surroundingsKhurram Waheed, Fathi M. Salem. 33-36
• Lossless data hiding: fundamentals, algorithms and applicationsYun Q. Shi, Zhicheng Ni, Dekun Zou, Changyin Liang, Guorong Xuan. 33-36
• Low noise amplifier for recording ENG signals in implantable systemsJordi Sacristán, M. Teresa Osés. 33-36
• Efficient hardware-oriented cellular active contoursDavid López Vilariño, Csaba Rekeczky. 33-36 [doi]
• 6.61MHz to 317MHz nth-order current-mode low-pass and high-pass OTA-only-without-C filterChun-Ming Chang. 37-40
• High-level design environment for massive parallel VLSI-implementations of statistical signal- and image processing modelsStephan Stilkerich, Joachim K. Anlauf. 37-40 [doi]
• Perception based binary image watermarkingAnthony T. S. Ho, Niladri B. Puhan, Pina Marziliano, Anamitra Makur, Yong Liang Guan. 37-40
• Sparse component analysis of overcomplete mixtures by improved basis pursuit methodPando G. Georgiev, Andrzej Cichocki. 37-40
• A low-power implantable Pseudo-BJT-based silicon retina with solar cells for artificial retinal prosthesesChung-Yu Wu, Felice Cheng, Cheng-Ta Chiang, Po-Kang Lin. 37-40
• Rich dynamics in weakly-coupled full-range cellular neural networksMauro Di Marco, Mauro Forti, Alberto Tesi. 41-44 [doi]
• Relevance feedback using random subspace methodWei Jiang, Mingjing Li, HongJiang Zhang, Jie Zhou. 41-44
• An efficient inductive power link design for retinal prosthesisGurhan Alper Kendir, Wentai Liu, Rizwan Bashirullah, Guoxing Wang, Mark S. Humayun, James D. Weiland. 41-44
• A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage deviceMing-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu. 41-44
• A dual mode decision feedback equalizer employing the conjugate gradient algorithmYihai Zhang, T. Aaron Gulliver. 41-44
• Blind uplink space-time channel estimation for space-time coded multicarrier code division multiple access systemsYanxing Zeng, Qinye Yin, Le Ding, Ke Deng. 45-48
• Arrays of switched Chua s circuitsRiccardo Caponetto, Luigi Fortuna, Mattia Frasca, Sebastiano Guzzardi, Alessandro Rizzo. 45-48 [doi]
• Craniofacial landmarks extraction by Partial Least Squares RegressionIdris El-Feghi, Yasser Alginahi, Maher A. Sid-Ahmed, Majid Ahmadi. 45-48
• Interactive content-based image retrieval using Laplacian mixture model in the wavelet domainTahir Amin, Ling Guan. 45-48
• Design of a 1.5-V high-order curvature-compensated CMOS bandgap referenceChi Yat Leung, Ka Nang Leung, Philip K. T. Mok. 48-52 [doi]
• Fuzzy vector filters for microarray image enhancementRastislav Lukac, Konstantinos N. Plataniotis, Bogdan Smolka, Anastasios N. Venetsanopoulos. 49-52
• A polynomial method for blind identification of MIMO channelsWeizhou Su, Wei Xing Zheng. 49-52
• Investigation of phase-wave propagation phenomena in second order CNN arraysZonghuang Yang, Kazuya Tsuruta, Yoshifumi Nishio, Akio Ushida. 49-52 [doi]
• Design issues on request migration for video-on-demand servicesYinqing Zhao, C. C. Jay Kuo. 49-52
• CMOS microelectrode array for extracellular stimulation and recording of electrogenic cellsFlavio Heer, Wendy Franks, Ian McKay, Stefano Taschini, Andreas Hierlemann, Henry Baltes. 53-56
• Keyword propagation for image retrievalFeng Jing, Mingjing Li, HongJiang Zhang, Bo Zhang. 53-56
• Pattern formation on the prototype complex-cell CNN-UM chip (CACE1K)Dávid Bálya, István Petrás, Csaba Rekeczky. 53-56 [doi]
• Fast force-directed/simulated evolution hybrid for multiobjective VLSI cell placementJunaid A. Khan, Sadiq M. Sait. 53-56
• A low-power low-voltage MOSFET-only voltage referenceFerdinando Bedeschi, Edoardo Bonizzoni, Andrea Fantini, Claudio Resta, Guido Torelli. 57-60 [doi]
• A C-less ASK demodulator for implantable neural interfacing chipsChua-Chin Wang, Ya-Hsin Hsueh, U. Fat Chio, Yu-Tzu Hsiao. 57-60
• Simultaneous delay and power optimization in global placementMongkol Ekpanyapong, Karthik Balakrishnan, Vidit Nanda, Sung Kyu Lim. 57-60
• A novel approach to video sequence matching using color and edge features with the modified Hausdorff distanceSang Hyun Kim, Rae-Hong Park. 57-60
• A 32 /spl times/ 32 four layer reaction-diffusion CNN chipBertram Emil Shi, B. Tao Luo. 57-60 [doi]
• A background digital self-calibration scheme for pipelined ADCs based on transfer curve estimationHanjun Jiang, Haibo Fei, Degang Chen, Randall L. Geiger. 61-64 [doi]
• A comparison of two similarity measures in intensity-based ultrasound image registrationShuang Gao, Yang Xiao, Shao-Hai Hu. 61-64
• A novel approach to real time multimedia forwarding over heterogeneous networksKeman Yu, Jiang Li, Shipeng Li. 61-64
• Module placement based on quadratic programming and rectangle packing using less flexibility first principleSheqin Dong, Zhong Yang, Xianlong Hong, Yuliang Wu. 61-64
• Analysis and design of cellular neural networksFernando Corinto, Marco Gilli, Pier Paolo Civalleri. 61-4 [doi]
• Prioritized retransmission for error protection of video streaming over WLANsHsiao-Cheng Wei, Yuh-Chou Tsai, Chia-Wen Lin. 65-68
• A unifying group of global asymptotical stability of neural networks with delayChai Wah Wu, Ying Sue Huang. 65-8 [doi]
• Performance and RLC crosstalk driven global routingLing Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He. 65-68
• A novel queuing architecture for background calibration of pipeline ADCsAnup Savla, Jennifer Leonard, Arun Ravindran. 65-68
• Nonlinear techniques and neural activity: emergent trends in MEG dataManuela La Rosa, Maide Bucolo, Gea Bucolo, Luigi Fortuna, Mattia Frasca, David Shannahoff-Khalsa, Massimiliano Sorbello. 65-68
• A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D convereter in 0.25-µm CMOS [convereter read converter]Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei. 69-72
• A novel representation method for electromyogram (EMG) signal with predefined signature and envelope functional bankHakan Gürkan, Ümit Güz, B. Siddik Yarman. 69-72
• Video error concealment by using Kalman-filtering techniqueZhi-Wei Gao, Wen-Nung Lie. 69-72
• Multi-layer floorplanning for reliable system-on-packagePun Hang Shiu, Ramprasad Ravichandran, Siddharth Easwar, Sung Kyu Lim. 69-72
• Regular small-world cellular neural networks: key properties and experimentsGergely Tímár, Dávid Bálya. 69-72 [doi]
• A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converterBabak Nejati, Omid Shoaei. 73-76
• Memory optimization techniques for UMTS code generationDaniele Lo Iacono, Ettore Messina, Giuseppe Avellone, Agostino Galluzzo. 73-76
• Channel decoder architecture of OFDM based DMB systemBontae Koo, Jinkyu Kim, Juhyun Lee, Nak-Woong Eum, Jongdae Kim, Hyunmook Cho. 73-76
• Routing resources consumption on M-arch and X-archBo-Kyung Choi, Charles Chiang, Jamil Kawa, Majid Sarrafzadeh. 73-76
• Modelling power consumption of a H.263 video encoderXiaoan Lu, Thierry Fernaine, Yao Wang. 77-80
• A low voltage low power 8-bit folding/interpolating ADC with rail-to-rail input rangeHamid Movahedian, Meysam Azin, Mehrdad Sharif Bakhtiar. 77-80
• A placement algorithm for implementation of analog LSI/VLSI systemsLihong Zhang, Rabin Raut, Yingtao Jiang. 77-80
• CNN-based real-time video detection of plasma instability in nuclear fusion applicationsPaolo Arena, Adriano Basile, Luigi Fortuna, Giuseppe Mazzitelli, Alessandro Rizzo, Maria Zammataro. 77-80 [doi]
• Power efficient architecture for (3, 6)-regular low-density parity-check code decoderYijun Li, Mahmoud Elassal, Magdy A. Bayoumi. 81-84
• A new marker-based watershed algorithmHai Gao, Ping Xue, Weisi Lin. 81-84
• Recursively combine floorplan and Q-place in mixed mode placement based on circuit s variety of block configurationChangqi Yang, Xianlong Hong, Hannah Honghua Yang, Qiang Zhou, Yici Cai, Yongqiang Lu. 81-84
• Layer assignment algorithm for RLC crosstalk minimizationBin Liu, Yici Cai, Qiang Zhou, Xianlong Hong. 85-88
• An on-off temporal filter circuit for visual motion analysisBertram Emil Shi, Eric K. C. Tsang, Philip S. P. Au. 85-88 [doi]
• An efficient architecture for peak-to-average power ratio reduction in OFDM systems in the presence of pulse-shaping filteringTheodoros Giannopoulos, Vassilis Paliouras. 85-88 [doi]
• A design strategy for area efficient high-order high-Q SC filtersJosé L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Miguel Angel Domínguez. 85-88
• Out-of-loop rate control for video codec hardware/software co-designChing-Ho Chen, Chun-Jen Tsai. 85-88
• An audio-scene cut detection method using fuzzy c-means algorithm for audio-visual indexingNaoki Nitanda, Miki Haseyama, Hideo Kitajima. 89-92
• Design of a pixel array circuit for thinning processChunyan Wang, Kuo-Ting Wu. 89-92 [doi]
• An efficient memory compression scheme for 8 k FFT in a DVB-T receiver and the corresponding error modelStamatis Krommydas, Vassilis Paliouras. 89-92
• Crosstalk driven routing resource assignmentHailong Yao, Qiang Zhou, Xianlong Hong, Yici Cai. 89-92
• RF circuit synthesis using particle swarm optimizationJinho Park, David J. Allstot. 93-96
• Region-of-Interest video coding by fuzzy control for H.263+ standardMing-Chieh Chi, Mei-Juan Chen, Ching-Ting Hsu. 93-96
• Improved cell core for a mixed-mode polynomial CNNMika Laiho, Ari Paasio, Kari Halonen. 93-96 [doi]
• A novel multipath searcher implementation for WCDMA receiversEugene Grayver, Eugene M. ElTawil, Jean-François Frigon, Kambiz Shoarinejad, Ali-Azam Abbasfar, Danijela Cabric. 93-96
• A programmable bandpass array using floating-gate elementsDavid W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler. 97-100
• Active array beamforming using the frequency-response masking techniqueYongzhi Liu, Zhiping Lin. 97-200 [doi]
• An optimization-based tool for the high-level synthesis of discrete-time and continuous-time /spl Sigma//spl Delta/ modulators in the Matlab/Simulink environmentJesús Ruiz-Amaya, José Manuel de la Rosa Utrera, Fernando Manuel Medeiro Hidalgo, Francisco V. Fernández, Rocio del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez. 97-100
• Very high speed Viterbi decoder with circularly connected analog CNN cell arrayHyongsuk Kim, Hongrak Son, Tamás Roska, Leon O. Chua. 97-100 [doi]
• New adaptive partial distortion search using clustered pixel matching error characteristicKo-Cheung Hui, Wan-Chi Siu, Yui-Lam Chan. 97-100
• Low power flexible Rake receivers for WCDMABoris D. Andreev, Edward L. Titlebaum, Eby G. Friedman. 97-100
• A real-time automatic lipreading systemShilin L. Wang, Wing Hong Lau, Shu Hung Leung, H. Yan. 101-104
• A simple STF-OFDM transmission scheme with maximum frequency diversity gainSang Soon Park, Han Kyong Kim, Heung Ki Baik. 101-104
• Lossless image coding based on lifting wavelet using discrete-time cellular neural network with multi-templatesHisashi Aomori, Tsuyoshi Otake, Nobuaki Takahashi, Mamoru Tanaka. 101-104 [doi]
• A novel analog layout synthesis toolLihong Zhang, Ulrich Kleine. 101-104
• A feedforward compensated high-linearity differential transconductor for RF applicationsSu-Tarn Lim, John R. Long. 105-108
• Low-power design for cell search in W-CDMAChi-Fang Li, Yuan-Sun Chu, Wern-Ho Sheen. 105-108
• Model-based video scene clustering with noise analysisHong Lu, Zhenyan Li, Yap-Peng Tan. 105-108
• Behavioural modelling of analog circuits by dynamic semi-symbolic analysisJunjie Yang, Sheldon X.-D. Tan. 105-108
• Compact semiconductor device modelling using higher level methodsMatt Francis, Vivek Chaudhary, H. Alan Mantooth. 109-112
• Face recognition with the robust feature extracted by the generalized Foley-Sammon transformGuang Dai, Yuntao Qian. 109-112
• A new MaxnetYi C. Chang, Sung-Nien Yu, Chung J. Kuo. 109-112 [doi]
• A high IIP3 X-band BiCMOS mixer for radar applicationsXuejin Wang, Aykut Dengi, Sayfe Kiaei. 113-116
• Two-sensor noise robust ASR with missing frames for Aurora2 taskCenk Demiroglu, David V. Anderson. 113-116
• Consistent model for drain current mismatch in MOSFETs using the carrier number fluctuation theoryHamilton Klimach, Alfredo Arnaud, Márcio C. Schneider, Carlos Galup-Montoro. 113-116
• Analysis of higher-order N-tone sigma-delta modulators for ultra wideband communicationsKai-Chuan Chang, Gerald E. Sobelman, Ebrahim Saberinia, Ahmed H. Tewfik. 113-116
• A 12.5 GHz RF matrix amplifier in 180nm SOI CMOSJinho Park, David J. Allstot. 117-20 [doi]
• 3-state pseudorandom noise (PN) sequence 3-pulse Reference Sharing Ultra Wideband SystemChun-Yi Lee, Chris Toumazou. 117-120
• Minimax design of FIR filters with low group delay using enhanced sequential quadratic programmingWu-Sheng Lu. 117-120 [doi]
• Scaling rules and parameter tuning procedure for analog design reuse in technology migrationAlessandro Savio, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Michele Quarantelli. 117-120
• Intrinsic mode functions for gait recognitionPrem Kuchi, Sethuraman Panchanathan. 117-120
• Termination of averaging networks in flash ADCsPedro M. Figueiredo, João C. Vital. 121-124
• Fast sensitivity analysis of transmission line networksNatalie Nakhla, Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla. 121-124
• Reference Sharing Ultra Wideband Communication SystemChun-Yi Lee, Chris Toumazou. 121-124
• Constrained eigenfilter designYing-Man Law, Chi-Wah Kok. 121-124 [doi]
• On the design of real and complex FIR filters with flatness and peak error constraints using semidefinite programmingS. C. Chan, K. M. Tsui. 125-128 [doi]
• QoS-driven scheduling for multimedia applicationsShaoxiong Hua, Gang Qu. 125-128
• Fast time-domain symbolic simulation for synthesis of sigma-delta analog-digital convertersHui Zhang, Alex Doboli. 125-128
• A statistical background calibration technique for flash analog-to-digital convertersChun-Cheng Huang, Jieh-Tsorng Wu. 125-128 [doi]
• Design of a low-complexity receiver for impulse-radio ultra-wideband communication systemsChia-Hsiang Yang, Yu-Hsuan Lin, Shih-Chun Lin, Tzi-Dar Chiueh. 125-128
• Trace-path analysis and performance estimation for multimedia application in embedded systemNelson Yen-Chung Chang, Kun-Bin Lee, Chein-Wei Jen. 129-132
• A study of digital decoders in flash analog-to-digital convertersErik Sall, Mark Vesterbacka, K. Ola Andersson. 129-132
• An efficient algorithm for transient and distortion analysis of mildly nonlinear analog circuitsJunjie Yang, Sheldon X.-D. Tan. 129-132
• A CMOS impulse generator for UWB wireless communication systemsYoungkyun Jeong, Sungyong Jung, Jin Liu. 129-132
• Mth-band linear-phase FIR filter interpolators and decimators utilizing the Farrow structureHåkan Johansson, Oscar Gustafsson. 129-132 [doi]
• Generation of disjoint cubes for multiple-valued functionsBogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja. 133-136
• On optimal IFIR filter designAlireza Mehrnia, Alan N. Willson Jr.. 133-136 [doi]
• Optimal offset averaging for flash and folding A/D convertersOvidiu Carnu, Adrian Leuciuc. 133-136
• Output-pattern directed decomposition for low power designChi-Wei Hu, TingTing Hwang. 137-140
• Minimization of L/sub 2/-sensitivity for state-space digital filters subject to L/sub 2/-scaling constraintsTakao Hinamoto, Hiroaki Ohnishi, Wu-Sheng Lu. 137-140 [doi]
• An adaptive spatial filter for early depth testChang-Hyo Yu, Lee-Sup Kim. 137-140
• 6-bit low power low area frequency modulation based flash ADCQuentin Diduck, Martin Margala. 137-140
• A mutual-negative-resistance quadrature CMOS LC oscillatorApisak Worapishet, Sarayut Virunphun, Mitchai Chongcheawchamnan, Sarayut Srisathit. 137-140
• Synthesis of amplifier transfer function using time-domain responseIgor M. Filanovsky, Arie van Staveren, Chris J. M. Verhoeven. 141-144 [doi]
• Analysis of oscillator amplitude control, and its application to automatic tuning of quality factor for active LC filtersShaorui Li, Yannis P. Tsividis. 141-144
• Joint optimization of error feedback and coordinate transformation for roundoff noise minimization in 2D state-space digital filtersTakao Hinamoto, Hiroaki Ohnishi, Wu-Sheng Lu. 141-144 [doi]
• A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transformsKuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen. 141-144
• FPGA implementation of controller-datapath pair in custom image processor designHongtu Jiang, Viktor Öwall. 141-144
• Optimized dynamic translinear implementation of the Gaussian wavelet transformSandro A. P. Haddad, Nanko Verwaal, Richard Houben, Wouter A. Serdijn. 145-148
• MPEG4 AVC/H.264 decoder with scalable bus architecture and dual memory controllerHae-Yong Kang, Kyung-Ah Jeong, Jung-Yang Bae, Young-Su Lee, Seung-Ho Lee. 145-148
• A wide tuning range VCO using capacitive source degenerationByunghoo Jung, Ramesh Harjani. 145-148
• Least leakage vector assisted technology mapping for total power optimizationRobert Yi-Ching Au, Chi-Ying Tsui. 145-148
• Method for equalizer design based on time-domain symmetryMladen Vucic, Goran Molnar, Hrvoje Babic. 149-152
• A semi-definite programming (SDP) method for designing IIR sharp cut-off digital filters using frequency-response maskingH. H. Chen, Shing-Chow Chan, Ka-Leung Ho. 149-152 [doi]
• VLSI architecture design of motion estimator and in-loop filter for MPEG-4 AVC/H.264 encodersYueh-Yi Wang, Yan-Tsung Peng, Chun-Jen Tsai. 149-152
• A predictive methodology for accurate substrate parasitic extractionAjit Sharma, Chenggang Xu, Wen Kung Chu, Nishath K. Verghese, Terri S. Fiez, Kartikeya Mayaram. 149-152
• Modelling and optimization of on-chip spiral inductor in S-parameter domainKen-ichi Okada, Hiroaki Hoshino, Hidetoshi Onodera. 153-156
• An algorithm for the optimization of adjustable fractional-delay all-pass filtersJuha Yli-Kaakinen, Tapio Saramäki. 153-156 [doi]
• On the design of an offset-PLL modulation loop for the EGSM bandAmr Hafez, Waleed F. Aboueldahab, Ahmed Helmy. 153-156
• Division-free rasterizer for perspective-correct texture filteringDonghyun Kim, Lee-Sup Kim. 153-156
• A physical and analytical model for substrate noise coupling analysisRobert Shreeve, Terri S. Fiez, Kartikeya Mayaram. 157-160
• Phase Locked Loop gain shaping for gigahertz operationKrzysztof Iniewski, Sebastian Magierowski, Marek Syrzycki. 157-160
• An adaptive DSP processor for high-efficiency computing MPEG-4 video encoderLi-Hsun Chen, Oscal T.-C. Chen, Teng-Yi Wang, Chi-Lung Wang. 157-160
• Mixing domains in signal processingYannis P. Tsividis. 157-160
• A shifted permuted difference coefficient methodHenrik Ohlsson, Oscar Gustafsson, Lars Wanhammar. 161-164 [doi]
• Phase-locked loop architecture for adaptive jitter optimizationSokratis D. Vamvakos, Carl Werner, Borivoje Nikolic. 161-164
• On improving the iterative watermark embedding technique for JPEG-to-JPEG watermarkingPeter H. W. Wong, Andy Chang, Oscar C. Au. 161-164
• Phase noise and accuracy in quadrature oscillatorsLuca Romanò, Salvatore Levantino, Andrea Bonfanti, Carlo Samori, Andrea L. Lacaita. 161-164
• An improved Z-parameter macro model for substrate noise couplingChenggang Xu, Terri S. Fiez, Kartikeya Mayaram. 161-164
• A coupled iterative/direct method for efficient time-domain simulation of nonlinear circuits with power/ground networksZhao Li, C.-J. Richard Shi. 165-168
• Data hiding for multimodal biometric recognitionAlexia Giannoula, Dimitrios Hatzinakos. 165-168
• Using all signed-digit representations to design single integer multipliers using subexpression eliminationAndrew G. Dempster, Malcolm D. Macleod. 165-168 [doi]
• A 2.4 GHz CMOS quadrature LC-oscillator/mixerLuís Bica Oliveira, Jorge R. Fernandes, Igor M. Filanovsky, Chris J. M. Verhoeven. 165-168
• Fast-switching analog PLL with finite-impulse responseSalvatore Levantino, Luca Romanò, Carlo Samori, Andrea L. Lacaita. 165-168 [doi]
• Digital filter design using subexpression elimination and all signed-digit representationsAndrew G. Dempster, Malcolm D. Macleod. 169-172 [doi]
• A novel ultra high-speed flip-flop-based frequency dividerRavindran Mohanavelu, Payam Heydari. 169-172
• Multigrid-based substrate coupling model extractionJoão M. S. Silva, Luis Miguel Silveira. 169-173
• On the security of structural information extraction/embedding for imagesChun-Shien Lu. 169-172
• Quadrature VCO based on direct second harmonic lockingPaola Tortori, Davide Guermandi, Eleonora Franchi, Antonio Gnudi. 169-172
• A wideband LC-VCO with enhanced PSRR for SOC applicationsSebastian Magierowski, Krzysztof Iniewski, Stefan Zukotynski. 173-176
• A robust watermarking method based on wavelet and Zernike transformJie Chen, Hongxun Yao, Wen Gao, Shaohui Liu. 173-176
• On the design of IIR bandpass filters with an adjustable bandwidth and centre frequencyHåkan Johansson. 173-176 [doi]
• Reed-Solomon behavioral virtual component for communication systemsEmmanuel Casseau, Bertrand Le Gal, Christophe Jégo, Nathalie Le Heno, Eric Martin. 173-176
• Partial random walk for large linear network analysisWeikun Guo, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong. 173-177
• DCS1800/WCDMA adaptive voltage-controlled oscillatorAleksandar Tasic, Wouter A. Serdijn, John R. Long. 177-180
• A high throughput limited search trellis decoder for convolutional code decodingTong Zhang. 177-180
• Matrix pencil based realizable reduction for distributed interconnectsJanet Meiling Wang, Omar Hafiz. 177-180
• On completion of M-channel perfect reconstruction filter banks with prescribed admissible FIR scaling filterYing-Jui Chen, Kevin Amaratunga. 177-180 [doi]
• A texture-based tamper detection scheme by fragile watermarkYazhou Liu, Wen Gao, Hongxun Yao, Shaohui Liu. 177-180
• Frequency driven repeater insertion for deep submicronNisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani. 181-184
• A neural network approach for human emotion recognition in speechMuhammad Waqas Bhatti, Yongjin Wang, Ling Guan. 181-184
• A dynamic analysis of a latched CMOS comparatorLourans Samid, Patrick Volz, Yiannos Manoli. 181-184 [doi]
• A low-power, hard-decision analogue convolutional decoder using the modified feedback decoding algorithmBilly Tomatsopoulos, Andreas Demosthenous. 181-184
• A new digital signature schemeAlaa Eldin Fahmy, Wael M. Badawy. 185-188
• Generalizations of adjoint networks technique for RLC interconnects model-order reductionsHerng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng. 185-188
• A probabilistic reasoning approach to closed-room people monitoringJi Tao, Yap-Peng Tan. 185-188
• Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reductionIlhan Hatirnaz, Yusuf Leblebici. 185-188
• Adaptive multimedia content personalizationNikolaos D. Doulamis, Pavlos S. Georgilakis. 189-192
• Scaleable check node centric architecture for LDPC decoderRohit Singhal, Gwan S. Choi, Nathan Mickler, Prabhavati Koteeswaran. 189-192
• Delay bound based CMOS gate sizing techniqueAlexandre Verle, Xavier Michel, Philippe Maurine, Nadine Azémard, Daniel Auvergne. 189-192
• Synthesis of static multiple input multiple output MITE networksShyam Subramanian, David V. Anderson, Paul E. Hasler. 189-192
• Time-domain constraints for the design of FRM-based cosine-modulated and modified DFT filter banks with a large number of bands and zero intersymbol interferenceMiguel Benedito Furtado Jr., Paulo S. R. Diniz, Sergio L. Netto, Tapio Saramäki. 189-192 [doi]
• Direct Sigma Delta GMSK modulator modeling and design for 2.5 G TX applicationsNicola Lofù, Gianfranco Avitabile, Biagio Bisanti, Stefano Cipriani. 193-196
• Probabilistic approach to K-nearest neighbor video retrievalNaixiang Lian, Yap-Peng Tan. 193-196
• M-channel lifting structure for unimodular filter bankRohit Kumar, Ying-Jui Chen, Soontorn Oraintara, Kevin Amaratunga. 193-196
• A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technologyArvind Kumar, Sandip Tiwari. 197-200
• Video summarization by spatial-temporal graph optimizationShi Lu, Michael R. Lyu, Irwin King. 197-200
• A systematic approach for analyzing fast addition algorithms using counter tree diagramsNaofumi Homma, Jun Sakiyama, Taihei Wakamatsu, Takafumi Aoki, Tatsuo Higuchi. 197-200
• A radio-frequency CMOS active inductor and its application in designing high-Q filtersHaiqiao Xiao, Rolf Schaumann, W. Robert Daasch, Phillip K. Wong, Branimir Pejcinovic. 197-200
• HWP: a new insight into canonical signed digitFei Xu, Chip-Hong Chang, Ching-Chuen Jong. 201-204
• Audio watermarking using time-frequency compression expansionFoo Say Wei, Ho Shuet Mun, Ng Ling Mei. 201-204 [doi]
• Multi-server optimal bandwidth monitoring for collaborative distributed retrievalLihang Ying, Anup Basu, Satish K. Tripathi. 201-204
• An equation error approach for the design of digital IIR compensation filters in IQ modulatorAnthony G. K. C. Lim, Victor Sreeram, Guo-Qing Wang. 205-208 [doi]
• A high speed trans-impedance amplifier using 0.13 /spl mu/m triple-well CMOS technologyNoushin Riahi, Ali Fotowat Ahmady, Lawrence Loh. 205-208
• Multiple description video coding based on zero paddingDong Wang, Cedric Nishan Canagarajah, David W. Redmill, David R. Bull. 205-208
• Fast multilevel floorplanning for large scale modulesChing-Chung Hu, De-Sheng Chen, Yi-Wen Wang. 205-208
• Low-variance TCP-friendly throughput estimation for congestion control of layered video multicastKitae Nahm, C. C. Jay Kuo. 209-212
• A CMOS low-power ADC for DVB-T and DVB-H systemsOlujide A. Adeniran, Andreas Demosthenous, Chris Clifton, Sam Atungsiri, Randeep Soin. 209-212
• How many solutions does a SAT instance have?Pushkin R. Pari, Lin Yuan, Gang Qu. 209-212
• Full parallel process for multidimensional wave digital filtering via multidimensional retiming techniqueChien-Hsun Tseng, Stuart Lawson. 209-212 [doi]
• 6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1: 8 CMOS demultiplexersShanfeng Cheng, José Silva-Martínez. 209-212
• A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elementsAngelo W. Pereira, Daniel J. Allen, Paul E. Hasler. 213-216
• Four-channel SiGe transimpedance amplifier array for parallel optical interconnectsSung Min Park. 213-216
• High performance spatial-temporal de-interlacing technique using interfield informationChing-Ting Hsu, Mei-Juan Chen, Chin-Hui Huang. 213-216
• Multidimensional wave digital filtering approach for numerical integration of non-linear shallow water equationsChien-Hsun Tseng, Stuart Lawson. 213-216 [doi]
• A new generation of ISCAS benchmarks from formal verification of high-level microprocessorsMiroslav N. Velev. 213-216
• CMOS limiting optical preamplifiers using dynamic biasing for wide dynamic rangeSharon Goldberg, Stephen Liu, Sean Nicolson, Khoman Phang. 217-220
• A high-speed low-latency digit-serial hybrid adderKrister Landernäs, Johnny Holmberg, Mark Vesterbacka. 217-220 [doi]
• Cross-layer design for QoS wireless communicationsJie Chen, Tiejun Lv, Haitao Zheng. 217-220
• A 50-MHz CMOS quadrature charge sampling circuit with 66 dB SFDRSami Karvonen, Tom A. D. Riley, Juha Kostamovaara. 217-220
• ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanismRouying Zhan, Haigang Feng, Haolu Xie, Albert Z. Wang. 217-220
• Fault equivalence and diagnostic test generation using ATPGAndreas G. Veneris, Robert Chang, Magdy S. Abadir, Mandana Amiri. 221-224
• A new cryptographic system and its VLSI implementationJui-Cheng Yen, Hun-Chen Chen, Shin-Shian Jou. 221-224
• Reconstruction of non-uniformly sampled signal using transposed Farrow structureDjordje Babic, Markku Renfors. 221-224 [doi]
• Improved multicast switch architecture for optical cable television and video surveillance networksHeikki Kariniemi, Jari Nurmi. 221-224
• Rapid bit-error-rate measurements of infrared communication systemsMeng-Lin Hsia, Oscal T.-C. Chen, Huang-Tzung Jan, Sun-Chen Wang, Yaw-Tyng Wu. 225-228
• Direct versus iterative methods for fixed-point implementation of matrix inversionMikko Ylinen, Adrian Burian, Jarmo Takala. 225-228 [doi]
• Analysis and architecture design for high performance JPEG2000 coprocessorBing-Fei Wu, Chung-Fu Lin. 225-228
• A hybrid-type test pattern generating mechanismChuen-Yau Chen, An-Chi Hsu. 225-228
• Power-conscious design methodology for class-A switched-current wave filtersReuben Wilcock, Bashir M. Al-Hashimi. 225-228
• A compact block-matching cell for analogue motion estimation processorsMladen Panovic, Andreas Demosthenous. 229-232
• A new segmentation technique for noisy multi-component signals using wavelet transformFarook Sattar, Rajamani Doraiswami, Moe Pwint. 229-232 [doi]
• Efficient analysis of multilayered broadside edge-coupled anisotropic structures for microwave applicationsMohamed Lamine Tounsi, Abdfelhamid Khodja, Mustapha Chérif-Eddine Yagoub. 229-232
• Low power current rectifiers for large scale current-mode signal processingRalf M. Philipp, Ralph Etienne-Cummings. 229-232
• Placement and routing optimization for circuits derived from BDDsThomas Eschbach, Rolf Dreschler, Bernd Becker. 229-232
• An ultra-low power analogue directionality system for digital hearing aidsPhil Corbishley, Esther Rodríguez-Villegas, Chris Toumazou. 233-236
• L-simulator: a magPEEC-based new CAD tool for simulating magnetic-enhanced IC inductors of 3D arbitrary geometryHaibo Long, Zhenghe Feng, Haigang Feng, Albert Z. Wang, Tianling Ren. 233-237
• Direct digital frequency synthesizer with multi-stage linear interpolationHiroomi Hikawa. 233-236
• A 5.1-GHz CMOS PLL based integer-N frequency synthesizer with ripple-free control voltage and improved acquisition timeSadeka Ali, Martin Margala. 237-240
• N:::TH::: order circular symmetry pattern and hexagonal tesselation: two new layout techniques cancelling nonlinear gradientChengming He, Kuangming Yap, Degang Chen, Randall L. Geiger. 237-240
• An efficient approach for hierarchical submodule extractionYi-Wei Lin, Jing-Yang Jou. 237-240
• A novel embedded memory architecture for real-time mesh-based motion estimationMohammed Sayed, Wael M. Badawy. 237-240
• Computing the transfer function for second-order 2D systemsGeorge E. Antoniou, Marinos T. Michael. 237-240 [doi]
• 2D quaternion Fourier spectral analysis and its applicationsJa-Han Chang, Soo-Chang Pei, Jian-Jiun Ding. 241-244 [doi]
• Algorithm for yield driven correction of layoutYang Wang, Yici Cai, Xianlong Hong, Qiang Zhou. 241-245
• Transferring performance gain from software prefetching to energy reductionDeepak N. Agarwal, Sumitkumar N. Pamnani, Gang Qu, Donald Yeung. 241-244
• Lumped passive circuits for 5GHz embedded test of RF SoCsJangsup Yoon, William R. Eisenstadt. 241-244
• A translinear-based RF RMS detector for embedded testQizhang Yin, Robert M. Fox, William R. Eisenstadt. 245-248
• A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filterAndrea Gerosa, Andrea Neviani. 245-248
• A new prescaler for fully integrated 5-GHz CMOS frequency synthesizerChin-Sheng Chen, Robert C. Chang. 245-248
• Symbolic noise analysis in analog integrated circuitsCarlos Sánchez-López, Esteban Tlelo-Cuautle. 245-248
• The SRE/SRM approach for spectral testing of AMS circuitsZhongjun Yu, Degang Chen, Randall L. Geiger. 249-252
• Empirical evaluation of timing and power in resonant clock distributionJuang-Ying Chueh, Conrad H. Ziesler, Marios C. Papaefthymiou. 249-252
• Minimization of L/sub 2/-sensitivity for 2-D state-space digital filters subject to L/sub 2/-scaling constraintsTakao Hinamoto, Hiroaki Ohnishi, Wu-Sheng Lu. 249-252
• An efficient logic extraction algorithm using partitioning and circuit encodingLily Huang, Tai-Ying Jiang, Jing-Yang Jou, Heng-Liang Huang. 249-252
• CMOS integrated transformer-feedback Q-enhanced LC bandpass filter for wireless receiversWesley A. Gee, Phillip E. Allen. 253-256
• Frequency-domain error analysis of linear multistep methodsGiorgio Casinovi, Giuseppe M. Veca. 253-256
• A calibration technique for a high-resolution flash time-to-digital converterPeter M. Levine, Gordon W. Roberts. 253-256
• Bayer pattern based digital zooming approachRastislav Lukac, Konstantinos N. Plataniotis. 253-256 [doi]
• A power and area efficient multi-mode FEC processorYi-Chen Tseng, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee. 253-256
• Asynchronous, quasi-Adiabatic (Asynchrobatic) logic for low-power very wide data width applicationsDavid J. Willingham, Izzet Kale. 257-260
• An IIP2 calibration technique for direct conversion receiversMikko Hotti, Jussi Ryynänen, Kalle Kivekäs, Kari Halonen. 257-260
• An alternative DFT methodology to test high-resolution Sigma Delta modulatorsSara Escalera, José M. García-González, Oscar Guerra, José Manuel de la Rosa, Fernando Manuel Medeiro Hidalgo, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez. 257-260
• UMTS/GSM multi mode receiver designHorst Fischer, Frank Henkel, Michael Engels, Peter Waldow. 261-264
• Synthesis scheme for low power designs with multiple supply voltages by tabu searchLing Wang, Yingtao Jiang, Henry Selvaraj. 261-264
• Reactance network shaping a sinusoidal pulse with sinusoidal envelope of finite durationIgor M. Filanovsky. 261-264
• A distributed TS-MUX architecture for multi-chip extension beyond the HDTV levelTakayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima. 261-264
• A CMOS multi-standard receiver architecture for ISM and UNII band applicationsHo-Kwon Yoon, Mohammed Ismail. 265-268
• Graphics processor unit (GPU) acceleration of finite-difference time-domain (FDTD) algorithmSean E. Krakiwsky, Laurence E. Turner, Michal M. Okoniewski. 265-268
• An efficient architecture for color space conversion using Distributed ArithmeticFaycal Bensaali, Abbes Amira, Ahmed Bouridane. 265-268
• A 5 GHz direct-conversion receiver with DC offset correctionPaul W. M. Laferriere, Dave Rahn, Calvin Plett, John W. M. Rogers. 269-272
• A new multi-ramp driver model with RLC interconnect loadLakshmi Kalpana Vakati, Janet Meiling Wang. 269-272
• MSE analysis of an allpass filter-based adaptive IIR notch filter with a normalized algorithmAloys Mvuma, Shotaro Nishimura, Takao Hinamoto. 269-272 [doi]
• Hardware architecture design for H.264/AVC intra frame coderYu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen. 269-272
• Mixed-mode parameter analysis of fully differential circuitsTimo Rahkonen, Jyri Kortekangas. 269-272
• Dynamic modelling of analog integrated filters for the stability study of on-chip automatic tuning loopsHerminio Martínez, Eva Vidal, Eduard Alarcón, Alberto Poveda. 273-276
• Gain bandwidth considerations in fully integrated distributed amplifiers implemented in siliconRony E. Amaya, Jorge Aguirre, Calvin Plett. 273-276
• Robust adaptive beamforming for large steering angle errorChangzheng Ma, Boon Poh Ng, Haoji Bao, Xuebin Yang. 273-276 [doi]
• Analysis and design of macroblock pipelining for H.264/AVC VLSI architectureTung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen. 273-276
• A compact optimization methodology for single-ended LNAGülin Tulunay, Sina Balkir. 273-276
• X ray and blue print: tools for MOSFET analog circuit design addressing short-channel effectsRodrigo L. Oliveira Pinto, Franco Maloberti. 277-280
• Design of multidimensional filter banks using Grobner bases: a surveyZhiping Lin, Li Xu, Qinghe Wu. 277-280 [doi]
• Simultaneous realization of Z/sub 21//Z/sub 11/ and Y/sub 21/ of an RC two-portTetsuo Nishi, Masato Ogata. 277-280
• Glitch-conscious low-power design of arithmetic circuitsHenrik Eriksson, Per Larsson-Edefors. 281-284
• A power constrained simultaneous noise and input matched low noise amplifier design techniqueTrung-Kien Nguyen, Yang-Moon Su, Sang-Gug Lee. 281-284
• SEAMS - a SystemC environment with analog and mixed-signal extensionsHessa Al-Junaid, Tom J. Kazmierski. 281-284
• An on-chip DNL estimation and reconfiguration for improved linearity in current steering DACSunil Rafeeque, Vinita Vasudevan. 281-284
• A directional decomposition: theory, design, and implementationTruong T. Nguyen, Soontorn Oraintara. 281-284
• Reducing multiplier energy by data-driven voltage variationTomoyuki Yamanaka, Vasily G. Moshnyaga. 285-288
• Properties of fastest linearly independent transforms over GF(3)Bogdan J. Falkowski, Cheng Fu. 285-289
• Inductive peaking in wideband CMOS current amplifiersBendong Sun, Fei Yuan, Ajoy Opal. 285-288
• Efficient output-pruning of the 2-D FFT algorithmSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 285-288 [doi]
• Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errorsMartin Clara, Andreas Wiesbauer, Wolfgang Klatzer. 285-288
• A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulatorsMatthias Keller, Yiannos Manoli, Friedel Gerfers. 289-292
• Multi-polarity helix transform over GF(3)Cheng Fu, Bogdan J. Falkowski. 289-292
• Reduced-order realization of Fornasini-Marchesini model for 2D systemsLi Xu, Lianku Wu, Qinghe Wu, Zhiping Lin, Yegui Xiao. 289-292 [doi]
• A novel fast low voltage dynamic threshold true single phase clocking adiabatic circuitMichael M. Yang, James A. Barby. 289-292
• A 5-Gb/s 1/8-rate CMOS clock and data recovery circuitJin Kyu Kwon, Tae Kwan Heo, Sang-Bock Cho, Sung Min Park. 293-296
• A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog codeKai-Yuan Jheng, Shyh-Jye Jou, An-Yeu Wu. 293-296
• Immitance and telepolation-based procedures to test stability of continuous-discrete bivariate polynomialsYuval Bistritz. 293-296
• Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A convertersTao Chen, Georges G. E. Gielen. 293-296
• Shielding area optimization under the solution of interconnect crosstalkXin Zhao, Yici Cai, Qiang Zhou, Xianlong Hong, Lei He, Jinjun Xiong. 297-300
• A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakageHafijur Rahman, Chaitali Chakrabarti. 297-300
• A high-speed low-voltage phase detector for clock recovery from NRZ dataFrancesco Centurelli, Massimo Pozzoni, Giuseppe Scotti, Alessandro Trifiletti. 297-300
• Efficient adaptive Volterra filters for active nonlinear noise control with a linear secondary-pathDayong Zhou, Victor E. DeBrunner. 299-300 [doi]
• A convergence model for a CORDIC-based ARMA lattice filterShin ichi Shiraishi, Miki Haseyama, Hideo Kitajima. 301-304 [doi]
• Performance metrics for asynchronous digital circuits applicable to computer-aided designRajani Parthasarthy, Ivan S. Kourtev. 301-304
• Hardware implementation of complex reaction-diffusion neural networks using log-domain techniquesTeresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Bernabé Linares-Barranco. 301-304
• A CMOS 10 Gb/s clock and data recovery circuit with a novel adjustable K::pd:: phase detectorXinyu Chen, Michael M. Green. 301-304
• Hardware architecture for global motion estimation for MPEG-4 Advanced Simple ProfileChing-Yeh Chen, Shao-Yi Chien, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen. 301-304
• QME: an efficient subsampling-based block matching algorithm for motion estimationKun-Bin Lee, Hao-Yun Chin, Hui-Cheng Hsu, Chein-Wei Jen. 305-308
• Tracking of linear time varying systems by state-space recursive least-squaresMohammad Bilal Malik, Hafsa Qureshi, Rashid A. Bhatti. 305-308 [doi]
• Time-based arithmetic using step functionsVishnu Ravinuthula, John G. Harris. 305-308
• A 1/8-rate clock and data recovery architecture for high-speed communication systemsPedram Sameni, Shahriar Mirabbasi. 305-308
• RTL/ISS co-modeling methodology for embedded processor using SystemCYoichi Yuyama, Masao Aramoto, Kazutoshi Kobayashi, Hidetoshi Onodera. 305-308
• Digital controlled analog architecture for DCT and DST using capacitor switchingArindam Basu, Ashis Kumar Mal, Anindya Sundar Dhar. 309-312
• Test vector generation and classification using FSM traversalsRalph Marczynski, Mitchell A. Thornton, Stephen A. Szygenda. 309-312
• A bio-physically inspired silicon neuronEthan Farquhar, Paul E. Hasler. 309-312
• A new approach for computing canonical correlations and coordinatesMohammed A. Hasan. 309-312 [doi]
• A reconfigurable bidirectional active 2 dimensional dendrite modelEthan Farquhar, David N. Abramson, Paul E. Hasler. 313-316
• Fast adaptive identification of autoregressive signals subject to noiseWei Xing Zheng. 313-316 [doi]
• Low-power parallel tree architecture for full search block-matching motion estimationSiou-Shen Lin, Po-Chih Tseng, Liang-Gee Chen. 313-316
• A linearization technique for RF low noise amplifierChunyu Xin, Edgar Sánchez-Sinencio. 313-316
• Formal verification of an SoC platform protocol converterJounaïdi Ben Hassen, Sofiène Tahar. 313-316
• FPGA based accelerator for functional simulationMohamed N. Wageeh, Ayman M. Wahba, Ashraf M. Salem, Mohamed A. Sheirah. 317-320
• A self-synchronized RF-interconnect for 3-dimensional integrated circuitsQun Gu, Zhiwei Xu, Jenwei Ko, Szukang Hsien, M. Frank Chang. 317-320
• A fast dual symbol context-based arithmetic coding for MPEG-4 shape codingKun-Bin Lee, Jih-Yiing Lin, Chein-Wei Jen. 317-320
• A family of floating-gate adapting synapses based upon transistor channel modelsChristal Gordon, Ethan Farquhar, Paul E. Hasler. 317-20 [doi]
• Discrete pdf estimation in the presence of noiseByung-Jun Yoon, Palghat P. Vaidyanathan. 321-324 [doi]
• A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage processesMing-Dou Ker, Shih-Lun Chen, Chia-Sheng Tsai. 321-324
• Frequency domain wavelet method with GMRES for large-scale linear circuit simulationJian Wang, Xuan Zeng, Wei Cai, Charles Chiang, Jiarong Tong, Dian Zhou. 321-324
• Event-driven dynamic power management based on wavelet forecasting theoryAli Abbasian, Safar Hatami, Ali Afzali-Kusha, Mehrdad Nourani, Caro Lucas. 325-328
• Low power coupling-based encoding for on-chip busesMaged Ghoneima, Yehea I. Ismail. 325-328
• A 0.18 /spl mu/m CMOS 900 MHz receiver front-end using RF Q-enhanced filtersChris DeVries, Ralph Mason. 325-328
• Iterative algorithm for the design of optimal FIR analysis/synthesis filters for overdecimated filter banksAndre Tkacenko, Palghat P. Vaidyanathan. 325-328 [doi]
• A novel encoding method into sequence-pairChikaaki Kodama, Kunihiro Fujiyoshi, Teppei Koga. 329-332
• Beampattern synthesis for concentric circular ring array using MMSE designYunhong Li, Dominic K. C. Ho, Chiman Kwan. 329-332 [doi]
• Adaptable MOS current mode logic for use in a multi-band RF prescalerMark P. Houlgate, Daniel J. Olszewski, Karim Abdelhalim, Leonard MacEachern. 329-332
• Unified bus encoding by stream reconstruction with variable stridesTien-Fu Chen, Tsung-Ming Hsieh, Chun-Li Wei. 329-332
• Computing large-change sensitivity of periodic responses of nonlinear circuits using reduction techniquesPraveen Pai, Emad Gad, Ramachandra Achar, Roni Khazaka, Michel S. Nakhla. 333-336
• A novel memoryless AES cipher architecture for networking applicationsYeong-Kang Lai, Li-Chung Chang, Lien-Fei Chen, Chi-Chung Chou, Chun-Wei Chiu. 333-336
• Robust local polynomial regression using M-estimator with adaptive bandwidthShing-Chow Chan, Zhiguo Zhang. 333-336 [doi]
• Design of an ultra-low-power current sourceEdgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider. 333-336
• A new parallel architecture for low power linear feedback shift registersAbdullah Mamun, Rajendra S. Katti. 333-336
• An inter-carrier interference suppression scheme for OFDM systems in time-varying fading channelsShaoping Chen, Tianren Yao. 337-340
• Bias current generators with wide dynamic rangeTobi Delbrück, André van Schaik. 337-340
• Quick and effective buffered legitimate skew clock routingMeng Zhao, Xinjie Wei, Yici Cai, Xianlong Hong. 337-340
• A low-power group-based VLD designCheng-Hung Liu, Bai-Jue Shieh, Chen-Yi Lee. 337-340
• Coupling effects in an integrated beam-forming transmitterSvetoslav Gueorguiev, Saska Lindfors. 337-340
• Enhanced Parallel Interference Cancellation using Decorrelator for the base-station receiverArchana Chidanandan, Magdy A. Bayoumi. 341-344
• Theory of T-junction floorplans in terms of single-sequenceXuliang Zhang, Yoji Kajitani. 341-344
• A 2D DOA estimation algorithm for CDMA system with plane antenna arrayWei Yang, Shiming Li, Zhenhui Tan. 341-344
• High-precision DAC based on a self-calibrated sub-binary radix converterMarc Pastre, Maher Kayal. 341-344
• Addressing static and dynamic errors in bandpass unit element multibit DAC sJeroen De Maeyer, Pieter Rombouts, Ludo Weyten. 345-348
• A crosscorrelation predistorter using memory polynomialsAndré B. J. Kokkeler. 345-348 [doi]
• Digital receiver architectures for the IEEE 802.15.4 standardNicola Scolari, Christian C. Enz. 345-348
• Generating random benchmark circuits for floorplanningTao Wan, Malgorzata Chrzanowska-Jeske. 345-348
• A low power current-mode pixel with on-chip FPN cancellation and digital shutterAmine Bermak, Farid Boussaïd, Abdesselam Bouzerdoum. 345-348
• A real-time VLSI median filter employing two-dimensional bit-propagating architectureHideo Yamasaki, Tadashi Shibata. 349-352
• A programmable array of silicon neurons for the control of legged locomotionFrancesco Tenore, Ralph Etienne-Cummings, M. Anthony Lewis. 349-352
• A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearitySaeed Saeedi, Saeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh. 349-352 [doi]
• Transceiver circuits for pulse-based ultra-widebandTakahide Terada, Shingo Yoshizumi, Yukitoshi Sanada, Tadahiro Kuroda. 349-352
• A frequency domain approach for blind identification with filter bank precodersPalghat P. Vaidyanathan, Bojan Vrcelj. 349-352 [doi]
• A 14-bit, 200 MS/s digital-to-analog converter without trimmingKuo-Hsing Cheng, Tsung-Shen Chen, Chia Ming Tu. 353-358
• Signal reconstruction from spiking neuron modelsDazhi Wei, John G. Harris. 353-356
• Design and comparison of CMOS Current Mode Logic latchesMuhammad Usama, Tad A. Kwasniewski. 353-356
• Reconfigurable discrete cosine transform processor for object-based video signal processingPo-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen. 353-356
• An instruction set for the efficient implementation of the CORDIC algorithmSven Simon, Matthias Müller, Holger Gryska, Andreas Wortmann, Steffen Buch. 357-360
• A fast-lock DLL with power-on reset circuitKuo-Hsing Cheng, Yu-lung Lo. 357-360
• A floating-gate DAC arrayGuillermo J. Serrano, Paul E. Hasler. 357-360
• High-speed area-efficient recursive DFT/IDFT architecturesLan-Da Van, Chih-Chyau Yang. 357-360 [doi]
• An event-based VLSI network of integrate-and-fire neuronsElisabetta Chicca, Giacomo Indiveri, Rodney J. Douglas. 357-60
• A time domain winner-take-all network of integrate-and-fire neuronsJens Petter Abrahamsen, Philipp Häfliger, Tor Sverre Lande. 361-364
• On leakage current temperature characterization using sub-pico-ampere circuit techniquesBernabé Linares-Barranco, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Luis A. Camuñas. 361-364
• Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chipKimish Patel, Enrico Macii, Massimo Poncino. 361-364
• Hardware efficient fast parallel FIR filter structures based on iterated short convolutionChao Cheng, Keshab K. Parhi. 361-364 [doi]
• High-speed and wide-tuning-range LC frequency dividersKen Yamamoto, Takayasu Norimatsu, Minoru Fujishima. 361-364
• 2D-DCT on FPGA by polynomial transformation in two-dimensionsArturo Méndez Patiño, Marcos Martínez Peiró, Francisco Ballester, Guillermo Payá Vayá. 365-368
• Left-to-right binary signed-digit recoding for elliptic curve cryptographyRajendra S. Katti, Xiaoyu Ruan. 365-368
• Pulsed OFDM modulation for ultra wideband communicationsEbrahim Saberinia, Jun Tang, Ahmed H. Tewfik, Keshab K. Parhi. 369-392
• Low power decoding of BCH codesYuejian Wu. 369-372
• Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detectorHung Tien Bui, Yvon Savaria. 369-372
• A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systemsSai-Weng Sin, Seng-Pan U., Rui Paulo Martins. 369-372
• Automatic rapid programming of large arrays of floating-gate elementsGuillermo J. Serrano, Paul D. Smith, Haw-Jing Lo, Ravi Chawla, Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler. 373-376
• A novel 1.5 V CMFB CMOS down-conversion mixer design for IEEE 802.11 A WLAN systemsXuezhen Wang, Robert Weber, Degang Chen. 373-376
• Interference resilient transmission scheme for multiband OFDM system in UWB channelsSeung Young Park, Gadi Shor, Yong-Suk Kim. 373-376
• A heuristic approach to synthesize Boolean functions using TANT networkHafiz Md. Hasan Babu, Md. Rafiqul Islam, Rumana Nazmul, Md. Anwarul Haque, Ahsan Raja Chowdhury. 373-376
• On mismatch properties of MOS and resistors calibrated ladder structuresBernabé Linares-Barranco, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Gustavo Vicente-Sánchez. 377-380
• Power consumption optimization for low latency Viterbi DecoderMario Steinert, Stefano Marsili. 377-380
• High performance solution for interfering UWB piconets with reduced complexity sphere decodingJun Tang, Ahmed H. Tewfik, Keshab K. Parhi. 377-380
• The performance and robust implementation of a blind CMOE receiver for MC-CDMA systemsHui Cheng, S. C. Chan. 377-380 [doi]
• A fast Reed-Solomon Product-Code decoder without redundant computationsHyun-Yong Lee, In-Cheol Park. 381-384
• Bandpass sigma-delta (/spl Sigma/-/spl Delta/) architecture based efficient FM demodulator for software radioSaman S. Abeysekera. 381-384
• Channel estimation and synchronization with sub-Nyquist sampling and application to ultra-wideband systemsIrena Maravic, Martin Vetterli, Kannan Ramchandran. 381-384
• A subspace multiuser beamforming algorithm for downlink in mobile communication systemsNanyan Y. Wang, Panajotis Agathoklis, Andreas Antoniou. 381-384 [doi]
• Implementation of a zero-forcing residue equalizer using a Laguerre filter architectureSaman S. Abeysekera. 385-388 [doi]
• A low-voltage CMOS low-dropout regulator with enhanced loop responseKa Nang Leung, Philip K. T. Mok, Sai Kit Lau. 385-388
• A low-power low-voltage NMOS bulk-mixer with 20 GHz bandwidth in 90 nm CMOSChristoph Kienmayer, Marc Tiebout, Werner Simbürger, Arpad L. Scholtz. 385-388
• Silicon spike-based synaptic array and address-event transceiverR. Jacob Vogelstein, Udayan Mallik, Gert Cauwenberghs. 385-388
• Novel bit manipulation unit for communication digital signal processorsSung Dae Kim, Sug Hyun Jeong, Myung Hoon Sunwoo, Kyung Ho Kim. 385-388
• Low-voltage linear voltage regulator suitable for memoriesWalter Aloisi, Stello Matteo Billé, Gaetano Palumbo. 389-392 [doi]
• A simple and robust super-regenerative oscillator for the 2.4 GHz ISM bandPere Palà-Schönwälder, F. Xavier Moncunill-Geniz, Francisco del Águìla López, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas. 389-392
• Joint code-encoder-decoder design for LDPC coding system VLSI implementationHao Zhong, Tong Zhang. 389-392
• Biologically inspired artificial neural network algorithm which implements local learning rulesAusra Saudargiene, Bernd Porr, Florentin Wörgötter. 389-392
• Spurs modeling in direct digital period synthesizers related to phase accumulator truncationBadre Izouggaghen, Abdelhakim Khouas, Yvon Savaria. 389-392 [doi]
• A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifierHung-Chieh Tsai, Jyh-Yih Yeh, Wei-Hsuan Tu, Tai-Cheng Lee, Chorng-Kuang Wang. 393-396
• Spike based learning with weak multi-level static memoryHåvard Kolle Riis, Philipp Häfliger. 393-396
• Multi-level memory systems using error control codesHsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang. 393-396
• Jointly minimum SER transmitter and receiver FIR MIMO filters for QAM signallingAre Hjørungnes. 393-396 [doi]
• Simultaneous bidirectional signaling with adaptive pre-emphasisMing-Ta Hsieh, Gerald E. Sobelman. 397-400
• Memory-based low density parity check code decoder architecture using loosely coupled two data-flowsSe-Hyeon Kang, In-Cheol Park. 397-400
• Spike synchronization in a network of silicon integrate-and-fire neuronsShih-Chii Liu, Rodney J. Douglas. 397-400
• A CMOS bandgap reference with correction for device-to-device variationPreetam Tadeparthy. 397-400 [doi]
• A spike-based analogue circuit that emphasises in auditory stimuliNatasha Chia, Steve Collins. 401-404
• Error analysis and complexity optimization for the multiplier-less FFT-like transformation (ML-FFT)K. M. Tsui, S. C. Chan, K. W. Tse. 401-404 [doi]
• Pseudo-footless CMOS domino logic circuits for high-performance VLSI designsJinn-Shyan Wang, Shang-Jyh Shieh, Ching-Wei Yeh, Yuan-Hsun Yeh. 401-404
• 1000BASE-T Gigabit Ethernet baseband DSP IC designHsiu-Ping Lin, Nancy Fang-Yih Chen, Jyh-Ting Lai, An-Yeu Wu. 401-404
• Systematic design of double-sampling Sigma Delta ADC s with modified NTFPieter Rombouts, Jeroen De Maeyer, Johan Raman, Ludo Weyten. 401-404 [doi]
• A technique for high-speed circuits on SOI using look-ahead type active body bias controlMasaaki Iijima, Katsuya Fujita, Kazuki Fukuoka, Masahiro Numa, Keisuke Yamamoto, Kengo Takata. 405-408
• Condensed recursive structures for computing multi-dimensional DCT with arbitrary lengthChe-Hong Chen, Bin-Da Liu, Jar-Ferr Yang. 405-408 [doi]
• Transmultiplexers as precoders in modern digital communication: a tutorial reviewPalghat P. Vaidyanathan, Bojan Vrcelj. 405-412
• A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic rangeMaurits Ortmanns, Markus Kuderer, Yiannos Manoli, Friedel Gerfers. 405-408 [doi]
• A new full CMOS 2.5 V two-stage line driver with variable gain for ADSL applicationsSaeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh, Saeed Saeedi, Amin Quasem Safarian. 405-408
• Direct RF sampling continuous-time bandpass Delta-Sigma A/D converter design for 3G wireless applicationsUt-Va Koc, Jaesik Lee. 409-412 [doi]
• Fast thermal analysis for VLSI circuits via semi-analytical Green s function in multi-layer materialsBaohua Wang, Pinaki Mazumder. 409-412
• A class A/B low power amplifier for wireless sensor networksYuen-Hui Chee, Jan M. Rabaey, Ali M. Niknejad. 409-412
• A rational subdivision scheme using cosine-modulated waveletsS. C. Chan, Xuemei Xie. 409-412
• A novel prefilter design for higher multiplicity discrete multiwavelet transformsTai-Chiu Hsung, Daniel Pak-Kong Lun. 412-416 [doi]
• B-DTNMOS: a novel bulk dynamic threshold NMOS schemeWalid Elgharbawy, Magdy A. Bayoumi. 413-416
• Characteristics and modeling of a broadband transmission-line transformerArto Malinen, Kari Stadius, Kari Halonen. 413-416
• Zero-forcing equalization for time-varying systems with memoryCássio B. Ribeiro, Marcello L. R. de Campos, Paulo S. R. Diniz. 413-416
• Feed-forward path and gain-scaling - a swing and distortion reduction scheme for second order sigma-delta modulatorWern Ming Koe, Franco Maloberti. 413-416 [doi]
• Energy efficient dual threshold voltage dynamic circuits employing sleep switches to minimize subthreshold leakageVolkan Kursun, Eby G. Friedman. 417-420
• A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applicationsPui-In Mak, Seng-Pan U., Rui Paulo Martins. 417-420
• On pilot pattern design for PSAM-OFDM systemWei Zhang, Xiang-Gen Xia, Pak-Chung Ching. 417-420
• Scalable architecture for word HMM-based speech recognitionShingo Yoshizawa, Naoya Wada, Noboru Hayasaka, Yoshikazu Miyanaga. 417-420 [doi]
• A low-power 10-bit continuous-time CMOS Sigma Delta A/D converterJannik Hammel Nielsen, Erik Bruun. 417-420 [doi]
• A scalable compact architecture for the computation of integer binary logarithms through linear approximationChristophe Layer, Hans-Jörg Pfleiderer, Christoph Heer. 421-424
• Complete characterization of channel independent general DMT systems with cyclic prefixSoura Dasgupta, Ashish Pandharipande. 421-424
• CMOS digitally programmable cell for high frequency amplification and filteringBelén Calvo, Santiago Celma, Maria Teresa Sanz. 421-424 [doi]
• A low-power, 10 GHz back-gated tuned voltage controlled oscillator with automatic amplitude and temperature compensationRizwan Murji, M. Jamal Deen. 421-424
• An audio signal scaling technique harmonic grouping and shiftingSaman S. Abeysekera, Kabi Prakash Padhi, Javed Absar, Sapna George. 421-424
• Noise-robust automatic speech recognition using mainlobe-resilient time-frequency quantile-based noise estimationSiu Wa Lee, Pak-Chung Ching, Tan Lee. 425-428 [doi]
• A method for increasing the throughput of fixed coefficient digit-serial/parallel multipliersMagnus Karlsson, Mark Vesterbacka, Wlodek Kulesza. 425-428
• Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filtersTomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata. 425-428 [doi]
• Antipodal paraunitary precoding for OFDM applicationSee-May Phoong, Kai-Yen Chang, Yuan-Pei Lin. 425-428
• Jitter in high-speed serial and parallel linksPavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon. 425-428
• Nonlinear digital filters for beautifying facial images in multimedia systemsKaoru Arakawa. 429-432
• Modulo deflation in (2:::n:::+1, 2:::n:::, 2:::n:::-1) convertersShaoqiang Bi, Wei Wang 0003, Asim J. Al-Khalili. 429-432
• A 0.18µm CMOS SC lowpass filter for Bluetooth channel selectionJacqueline S. Pereira, Antonio Petraglia, Franco Maloberti. 429-432 [doi]
• Experimental results of a type-based predistorter for SSPA linearizationXinping Huang, Pierre Tardif, Mario Caron. 429-432
• Adaptive microphone array with noise statistics updatesHai Quang Dam, Siow Yong Low, Sven Nordholm, Hai Huyen Dam. 433-436 [doi]
• Video error concealment techniques using progressive interpolation and boundary matching algorithmTsung-Han Tsai, Yu-Xuan Lee, Yu Fong Lin. 433-436
• Geometric-mean interpolation for logarithmic number systemsMark G. Arnold. 433-436
• R&D platform for man scale wireless AD HOC networks towards a hardware demonstrator for 4G+ systemsPeter Rauschert, Arasch Honarbacht, Anton Kummert. 433-436
• A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applicationsShelly Xiao, José Silva, Un-Ku Moon, Gabor C. Temes. 433-436 [doi]
• Signal detection based on pattern classification for use in wireless CPFSK receiversDieter Brückmann, André Neubauer. 437-440 [doi]
• Optimization method for designing filter bank channelizer of a software defined radio using vertical common subexpression eliminationA. Prasad Vinod, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Chiew Tong Lau. 437-440
• A 50-MHz BiCMOS quadrature charge sampler and complex bandpass SC filter for narrowband applicationsSami Karvonen, Tom A. D. Riley, Sami Kurtti, Juha Kostamovaara. 437-440 [doi]
• JPEG based image compression with adaptive resolution conversion systemKazuhiro Shimauchi, Masahiro Ogawa, Akira Taguchi. 437-440
• New CMOS current-mode amplitude shift keying demodulator (ASKD) dedicated for implantable electronic devicesAbdelouahab Djemouai, Mohamad Sawan. 441-444 [doi]
• A low-power crosstalk-insensitive signaling scheme for chip-to-chip communicationKamran Farzan, David A. Johns. 441-444
• Perceptual coding of digital colour images based on a vision modelC. S. Tan, D. M. Tan, H. R. Wu. 441-444
• Arbitrate-and-move primitives for high throughput on-chip interconnection networksAydin O. Balkan, Gang Qu, Uzi Vishkin. 441-444
• Iterative MAP multi-user detection of synchronous CDMA with channel distortionShannon D. Blunt, Dominic K. C. Ho. 441-444 [doi]
• Substrate noise-aware floorplanning for mixed-signal SOCsMarcin Jeske, Grzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske, Benyi Wang. 445-448
• A novel wideband DOA estimation technique based on harmonic source model for a uniform linear arrayYegui Xiao, Liying Ma, Khashayar Khorasani. 445-448 [doi]
• Smart noise reduction system based on ALE and noise reconstruction systemNaoto Sasaoka, Yoshio Itoh, Kensaku Fujii, Yutaka Fukui. 445-448
• A fully integrated 0.5-7 Hz CMOS bandpass amplifierAlfredo Arnaud, Carlos Galup-Montoro. 445-448 [doi]
• Power spectral density of Transmit Reference Doublet trains and Reference Sharing Doublet trains in ultra wideband systemsChun-Yi Lee, Chris Toumazou. 445-448
• A 39/spl times/48 general-purpose focal-plane processor array integrated circuitPiotr Dudek. 448-452
• Parameterized SoC design for portable systemsSumant Bhutoria, Chaitali Chakrabarti. 449-452
• A nano-power tuneable edge-detection circuitTimothy G. Constandinou, Julius Georgiou, Chris Toumazou. 449-452 [doi]
• Burst receiver for upstream communications over twisted pair linesAlex W. Paek, Hichem Besbes, Yu Zhang, Ted Burk, Saf Asghar, Celite Milbrandt, Bruce Webb. 449-452
• On noisy FIR filtering via total least squares estimationWei Xing Zheng. 449-452 [doi]
• A high speed and low power CMOS current comparator for photon counting systemsFausto Borghetti, Lorenzo Farina, Piero Malcovati, Franco Maloberti. 453-456 [doi]
• An improved analog computation cell for Paris II, a programmable vision chipSebastien Moutault, Hervé Mathias, Jacques-Olivier Klein, Antoine Dupret. 453-456
• A novel I/Q mismatch compensation scheme for a low-IF receiver front-endJérémie Chabloz, Christian C. Enz. 453-456
• Source localization using TDOA with erroneous receiver positionsDominic K. C. Ho, L. Kovavisaruch, H. Parikh. 453-456 [doi]
• A 0.18 µm implementation of a floating-point unit for a processing-in-memory systemTaek-Jun Kwon, Joong-Seok Moon, Jeff Sondeen, Jeffrey T. Draper. 453-456
• VLSI potentiostat for amperometric measurements for electrolytic reactionsHarpreet S. Narula, John G. Harris. 457-460 [doi]
• Tunable matching networks for future MEMS-based transceiversAmro M. Elshurafa, Ezz I. El-Masry. 457-460
• A novel method to represent the speech signals by using language and speaker independent predefined functions setsÜmit Güz, Hakan Gürkan, B. Siddik Yarman. 457-460 [doi]
• A CNN-driven locally adaptive CMOS image sensorRicardo Carmona, Carlos M. Domínguez-Matas, Jorge Cuadri, Francisco Jiménez-Garrido, Ángel Rodríguez-Vázquez. 457-460
• On various low-hardware-complexity LMS algorithms for adaptive I/Q correction in quadrature receiversEdiz Çetin, Izzet Kale, Richard C. S. Morling. 461-464
• Dynamic pass-transistor dot operators for efficient parallel-prefix addersHenrik Eriksson, Per Larsson-Edefors. 461-464
• N /spl times/ 16 cellular test chips for low-pass filtering large imagesAsko Kananen, Mika Laiho, Kari Halonen, Ari Paasio. 461-464
• An improved critical-band transform processor for speech applicationsChao Wang, Yit-Chow Tong. 461-464 [doi]
• Low power implementation of an n-tone Sigma Delta converterShubha Bommalingaiahnapallya, Ramesh Harjani. 461-464 [doi]
• Boosting as a dimensionality reduction tool for audio classificationSourabh Ravindran, David V. Anderson. 465-468 [doi]
• A mixed-signal CMOS DTCNN chip for pixel-level snakesVictor M. Brea, David López Vilariño, Diego Cabello. 465-468
• Low-voltage sigma-delta modulator topologies for broadband applicationsMohammad Yavari, Omid Shoaei. 465-468 [doi]
• A gate-level strategy to design Carry Select AddersMassimo Alioto, Gaetano Palumbo, Massimo Poli. 465-468
• A new NDA timing error detector for BPSK and QPSK with an efficient hardware implementation for ASIC-based and FPGA-based wireless receiversYair Linn. 465-468
• An overview and comparison of analytical TCP modelsInas Khalifa, Ljiljana Trajkovic. 469-472
• Multiple pitch estimation of poly-phonic audio signals in a frequency-lag domain using the bispectrumSaman S. Abeysekera. 469-472 [doi]
• A CMOS-MEMS magnetic thin-film inductor for radio frequency and intermediate frequency filter circuitsGang Zhang, L. Richard Carley. 469-472
• Fast and efficient algorithm to design noise-shaping FIR filters for high-order overload-free stable sigma-delta modulatorsMitsuhiko Yagyu, Akinori Nishihara. 469-472 [doi]
• Compatible probability measures of the outputs of template-based speaker identification classifiers for data fusionGuangyu Zhou, Wasfy B. Mikhael. 473-476 [doi]
• Domino free 4-path time-interleaved second order sigma-delta modulatorKye-Shin Lee, Yunyoung Choi, Franco Maloberti. 473-476 [doi]
• VLSI implementation issues of lattice decoders for MIMO systemsZhan Guo, Peter Nilsson. 477-480
• A low latency and low power dynamic Carry Save AdderRamyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka. 477-480
• Modelling of TCP packet traffic in a large interactive growth networkDavid K. Arrowsmith, Matthew Woolf. 477-480
• An RF sub-sampling mixer, PGA and Sigma Delta ADC for conversion at 900 MHzRalph Mason, Chris DeVries, Eugene Ivanov. 477-480 [doi]
• On the correlation of TCP traffic in backbone networksHung Xuan Nguyen, Patrick Thiran, Chadi Barakat. 481-484
• Robust design of high gain amplifiers using dynamical systems and bifurcation theoryChengming He, Le Jin, Degang Chen, Randall L. Geiger. 481-484 [doi]
• A calibration method for PLLs based on transient responseMarco Cassia, Peter Shah, Erik Bruun. 481-484
• An experimental comparison of substrate noise generated by CMOS and by low-noise digital circuitsEdgar F. M. Albuquerque, Manuel M. Silva. 481-484
• A new contention resolution algorithm for the design of minimal logic depth multiplierless filtersFei Xu, Chip-Hong Chang, Ching-Chuen Jong. 481-484 [doi]
• Harmonic distortion in three-stage nested-Miller-compensated amplifiersGaetano Palumbo, Salvatore Pennisi. 485-488 [doi]
• An accurate and efficient estimation of switching noise in synchronous digital circuitsHusni M. Habal, Terri S. Fiez, Kartikeya Mayaram. 485-488
• An DFII based structure for 2-D separable-denominator digital filters with very low L/sub 2/-sensitivity measureZixue Zhao, Gang Li, Tao Fang. 485-488
• A robust approach to active queue management control in networksSabato Manfredi, Franco Garofalo, Mario di Bernardo. 485-488
• Modeling and diagnosis of analog circuits with probabilistic graphical modelsChristian Borgelt, Daniela Girimonte, Giuseppe Acciani. 485-488
• On dynamic behavior of weakly connected cellular neural networksMarco Gilli, Fernando Corinto. 489-492
• An improved technique to increase noise-tolerance in dynamic digital circuitsFernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac Vilela. 489-492
• A high-gain offset-compensated differential amplifierCraig Petrie, Tianxue Sun, Matt Miller. 489-492 [doi]
• A fast algorithm for crosspoint assignment under crosstalk constraints with shielding effectsKeiji Kida, Xiaoke Zhu, Changwen Zhuang, Yasuhiro Takashima, Shigetoshi Nakatake. 489-492
• On relation between non-disjoint decomposition and multiple-vertex dominatorsElena Dubrova, Maxim Teslenko, Andrés Martinelli. 493-496
• Single Miller capacitor compensated multistage amplifiers for large capacitive load applicationsXiaohua Fan, Chinmaya Mishra, Edgar Sánchez-Sinencio. 493-496 [doi]
• Design of multiplierless programmable linear phase narrowband-bandpass FIR filtersKamakshi Sivaramakrishnan, Ivan R. Linscott, Leonard G. Tyler. 493-496 [doi]
• The noise immunity of dynamic digital circuits with technology scalingFernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac Vilela. 493-496
• Towards a bio-inspired mixed-signal retinal processorTimothy G. Constandinou, Julius Georgiou, Chris Toumazou. 493-496
• An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique]Preetam Tadeparthy. 497-500 [doi]
• Studies on distributed algorithm for network flow optimization problem based on tie-set flow vector spaceYuki Shibata, Haruki Kubo, Hitoshi Watanabe. 497-500
• Fast RLS Fourier analyzers in the presence of frequency mismatchYegui Xiao, Liying Ma, Rabab Kreidieh Ward, Li Xu. 497-500 [doi]
• A new non-iterative model for switching window computation with crosstalk noiseOmar Hafiz, Pinhong Chen, Janet Meiling Wang. 497-500
• CNN wave based computation for robot navigation planningPaolo Arena, Luigi Fortuna, Adriano Basile, Mattia Frasca. 500-503
• Channel equalization using the G-ProbeConstantinos Panayiotou, Andreas Spanias, Kostas Tsakalis. 501-504 [doi]
• Novel pipelining of MSB-first add-compare select unit structure for Viterbi decodersKeshab K. Parhi. 501-504
• Unfolding of Petri nets with semilinear reachability setAtsushi Ohta, Kohkichi Tsuji. 501-504
• A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capabilityAndre Vilas Boas, Alfredo Olmos. 501-504 [doi]
• Finite iteration DT-CNN - new design and operating principlesChristian Merkwirth, Jochen Bröcker, Maciej Ogorzalek, Jörg D. Wichard. 504-507
• Pipelined parallel architecture for high throughput MAP detectorsRuwan N. S. Ratnayake, Gu-Yeon Wei, Aleksandar Kavcic. 505-508
• S-sequence: a new floorplan representation method preserving room abutment relationshipsYohei Ishimaru, Keishi Sakanushi, Shinsuke Kobayashi, Yoshinori Takeuchi, Masaharu Imai. 505-508
• Combined echo and noise cancellation based on Gauss-Seidel pseudo affine projection algorithmFelix Albu, H. K. Kwan. 505-508 [doi]
• A numerical design approach for high speed, differential, resistor-loaded, CMOS amplifiersEthan Crain, Michael H. Perrott. 508-511
• Calculation of non-mixed second derivatives in multirate systems through signal flow graph techniquesAndrea Arcangeli, Stefano Squartini, Francesco Piazza. 509-512
• Parallel Turbo decodingYuping Zhang, Keshab K. Parhi. 509-512
• A CMOS time amplifier for Femto-second resolution timing measurementMourad Oulmane, Gordon W. Roberts. 509-512 [doi]
• FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p)Ciaran McIvor, Máire McLoone, John V. McCanny. 509-512 [doi]
• Low-order modeling of head-related transfer functions using wavelet transformsJulio C. B. Torres, Mariane R. Petraglia, Roberto A. Tenenbaum. 513-516 [doi]
• VLSI architecture exploration for sliding-window Log-MAP decodersChien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen, Hsin-Fu Lo. 513-516
• Chaotic sequences in ACO algorithmsFlavio Cannavó, Luigi Fortuna, Mattia Frasca, Luca Patané. 513-516
• Fault modeling of RF blocks based on noise analysisJerzy Dabrowski. 513-516 [doi]
• Macromodeling of digital libraries for substrate noise analysisZhe Wang, Rajeev Murgai, Jaijeet S. Roychowdhury. 516-519
• Construction of linearly transformed planar BDD by Walsh coefficientsMark G. Karpovsky, Radomir S. Stankovic, Jaakko Astola. 517-520
• Accurate fault detection in switched-capacitor filters using structurally allpass building blocksAntonio Petraglia, Jorge M. Cañive, Mariane R. Petraglia. 517-520 [doi]
• An asynchronous SOVA decoder for wireless communication applicationWing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. 517-520
• An efficient VLSI/FPGA architecture for combining an analysis filterbank following a synthesis filterbankRavindra K. Sande, Anantharaman Balasubramanian. 517-520 [doi]
• Continuation method in multitone harmonic balanceSuihua Lu, Amit Narayan, Amit Mehrotra. 520-523
• Low thermal error sampling comparator for accurate settling measurementsDavid I. Bergman, Bryan C. Waltrip. 521-524 [doi]
• On the performance of discrete-time hybrid filter banks with coefficient errors and ARMA stochastic process inputMarcos Aurélio de Andrade Pinheiro, Antonio Petraglia. 521-524 [doi]
• New graph-based algorithms for partitioning VLSI circuitsChristopher J. Augeri, Hesham H. Ali. 521-524 [doi]
• Decoupling technique and crosstalk analysis for coupled RLC interconnectsJunmou Zhang, Eby G. Friedman. 521-524
• Millimeter-wave CMOS device modeling and simulationChinh H. Doan, Sohrab Emami, Ali M. Niknejad, Robert W. Brodersen. 524-527
• Op-amp swing reduction in sigma-delta modulatorsSunwoo Kwon, Franco Maloberti. 525-528 [doi]
• Effect of relative delay on the dissipated energy in coupled interconnectsMaged Ghoneima, Yehea I. Ismail. 525-528
• Multi-layer constrained via minimization with conjugate conflict continuation graphsRung-Bin Lin, Shuyu Chen. 525-528
• Alternative subband signal structures for complex modulated filter banks with perfect reconstructionAri Viholainen, Markku Renfors. 525-528 [doi]
• Improved design of frequency-response-masking filters using enhanced sequential quadratic programmingWu-Sheng Lu, Takao Hinamoto. 528-531
• Floating gate comparator with automatic offset manipulation functionalityEric Liu Wong, Pamela Abshire, Marc H. Cohen. 529-532 [doi]
• Effect of shield insertion on reducing crosstalk noise between coupled interconnectsJunmou Zhang, Eby G. Friedman. 529-532
• A new window for the design of cosine-modulated multirate systemsPilar Martin, Fernando Cruz-Roldán, Tapio Saramäki. 529-532 [doi]
• Frequency-response-masking technique incorporating extrapolated impulse response band-edge shaping filterYa Jun Yu, Yong Ching Lim, Kok Lay Teo, Guohui Zhao. 532-535
• A low phase noise 2.0 V 900 MHz CMOS voltage controlled ring oscillatorDean A. Badillo, Sayfe Kiaei. 533-536
• A novel delta-sigma modulator using resonant-tunneling quantizersMasaru Chibashi, Keisuke Eguchi, Takao Waho. 533-536 [doi]
• Design of complex polyphase IIR multi-flattop filtersArtur Krukowski, Izzet Kale. 533-536 [doi]
• Electrical isolation and fanout in intra-chip optical interconnectsAnand Pappu, Alyssa B. Apsel. 533-536
• Frequency-response masking based filters with the even-length bandedge shaping filterJianghong Yu, Yong Lian. 536-539
• Managing inductive coupling in wide signal bussesBassel Soudan. 537-40
• Selecting better EEG channels for classification of mental tasksKouhyar Tavakolian, Ali Motie Nasrabadi, Siamak Rezaei. 537-540 [doi]
• Low kickback noise techniques for CMOS latched comparatorsPedro M. Figueiredo, João C. Vital. 537-540 [doi]
• An efficient algorithm for the optimization of FIR filters synthesized using the multistage frequency-response masking approachJuha Yli-Kaakinen, Tapio Saramäki, Ya Jun Yu. 540-543
• A simple approach to the design of one-dimensional sparse arraysSanjit K. Mitra, Mikhail K. Tchobanou, Gordana Jovanovic-Dolecek. 541-544
• A low distortion and fast settling automatic gain control amplifier in CMOS technologyChung-Wei Lin, Yen-Zen Liu, Klaus Y. J. Hsu. 541-544 [doi]
• A high speed ASIC implementation of the Rijndael algorithmRefik Sever, A. Neslin Ismailoglu, Yusuf Çagatay Tekmen, Murat Askar. 541-544
• Design of a reconfigurable AES encryption/decryption engine for mobile terminalsThilo Pionteck, Thorsten Staake, Thomas Stiefmeier, Lukusa D. Kabulepa, Manfred Glesner. 545-548
• A 2.4 GHz low-power low-phase-noise CMOS VCO using spiral inductors and junction varactorsJie Long, Robert J. Weber. 545-548
• Multidimensional stability test using sum-of-squares decompositionBogdan Dumitrescu. 545-548 [doi]
• A zero-voltage and zero-current switching three-level DC-DC converter with secondary-assisted regenerative passive snubberTingting Song, Nianci Huang, Adrian Ioinovici. 548-551
• Gradient-based depth estimation from 4D light fieldsDonald F. Dansereau, Leonard T. Bruton. 549-552 [doi]
• Linearized CMOS OTA using active-error feedforward techniqueStanislaw Szczepanski, Slawomir Koziel, Edgar Sánchez-Sinencio. 549-552 [doi]
• Fully current controllable AM/FM modulator and quadrature sinusoidal oscillator based on CCCIIsMontree Siripruchyanun, Poolsak Koseeyaporn, Jeerasuda Koseeyaporn, Paramote Wardkein. 549-552
• High-speed hardware implementations of the KASUMI block cipherParis Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou. 549-552
• Hysteric controller for CMOS on-chip switching power convertersGerard Villar, Eduard Alarcón, Herminio Martínez, Eva Vidal, Francesc Guinjoan, Sonia Porta, Alberto Poveda. 552-555
• New class of the FPGA efficient cryptographic primitivesNick A. Moldovyan, Ma A. Eremeev, Nicolas Sklavos, Odysseas G. Koufopavlou. 553-556
• High performance Viterbi decoder using modified register exchange methodsJae-Sun Han, Tae-Jin Kim, Chanho Lee. 553-556 [doi]
• An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiersNima Maghari, Mohammad Yavari, Omid Shoaei. 553-556 [doi]
• Modeling, design and characterization of a new low jitter analog dual tuning LC-VCO PLL architectureRoberto Nonis, Nicola Da Dalt, Pierpaolo Palestri, Luca Selmi. 553-556
• State trajectory prediction control for boost convertersKelvin Ka Sing Leung, Henry Shu-Hung Chung. 556-559
• Two fast RSA implementations using high-radix montgomery algorithmSoner Yesil, A. Neslin Ismailoglu, Yusuf Çagatay Tekmen, Murat Askar. 557-560
• A programmable gain amplifier buffer design for video applicationsGonggui Xu, Haydar Bilhan. 557-560 [doi]
• Unified selectable fixed-coefficient recursive structures for computing DCT, IMDCT and subband synthesis filteringZhan-Yuan Cheng, Che-Hong Chen, Bin-Da Liu, Jar-Ferr Yang. 557-560
• Spectral shaping by generalized transfer function design in frequency modulation Sigma-Delta synthesizersSoeren R. Sappok, Andre Kruth, Guerkan Ordu, Ralf Wunderlich, Stefan Heinen. 557-560
• Design equations for sub-optimum operation of class-E amplifier with nonlinear shunt capacitanceTadashi Suetsugu, Marian K. Kazimierczuk. 560-563
• Low complexity digital PLL for instant acquisition CDRGordon Allan, John Knight. 561-564
• A 1.5 V high-linearity CMOS mixer for 2.4 GHz applicationsHung-Che Wei, Ro-Min Weng, Kun-Yi Lin. 561-564 [doi]
• Improved radix-4 and radix-8 FFT algorithmsSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 561-564 [doi]
• Toward the integration of microsystems supplyBruno Estibals, Corinne Alonso, Alain Salles, Angel Cid-Pastor, Henri Camon, Luis Martinez-Salamero. 564-567
• Fully-integrated DECT/Bluetooth multi-band LNA in 0.18µm CMOSVojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund. 565-568 [doi]
• An efficient split-radix FHT algorithmSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 565-568 [doi]
• Frequency synthesizer for on-chip testing and automated tuningAri Y. Valero-López, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio. 565-568
• A technique to deskew differential PCB tracesAmer H. Atrash, Brian Butka. 565-568
• Enhanced multiple Huffman table (MHT) encryption scheme using key hoppingDahua Xie, C. C. Jay Kuo. 568-571
• A new interpolated symbol timing recovery methodXiong Liu, Alan N. Willson Jr.. 569-572
• Mathematical properties of the two-parameter family of 9/7 biorthogonal filtersDavid B. H. Tay, Slaven Marusic, Marimuthu Palaniswami, Guang Deng. 569-572 [doi]
• An ADPLL circuit using a DDPS for genlock applicationsDorin Emil Calbaza, Ioan Cordos, Nigel Seth-Smith, Yvon Savaria. 569-572
• Low voltage, low power folded-switching mixer with current-reuse in 0.18µm CMOSVojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund. 569-72 [doi]
• Visual cryptography for print and scan applicationsWei-Qi Yan, Duo Jin, Mohan S. Kankanhalli. 572-575
• A DECT/Bluetooth multi-standard front-end with adaptive image rejection in 0.18µm CMOSVojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund. 573-576 [doi]
• Improved channel estimation over frequency-flat and rapid fading channelsTae Jin Hwang, Heung Ki Baik. 573-576 [doi]
• Resonance properties of Chebyshev chaotic sequencesTomohiro Yoshimura, Tohru Kohda. 573-576
• A new Schmitt trigger circuit in a 0.13 µm 1/2.5 V CMOS process to receive 3.3 V input signalsShih-Lun Chen, Ming-Dou Ker. 573-576
• Web search steganalysis: some challenges and approachesRajarathnam Chandramouli. 576-579
• Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in a 0.13-µm CMOS technologyChe-Hao Chuang, Ming-Dou Ker. 577-580
• RSA encryption algorithm based on torus automorphismsLjupco Kocarev, Marjan Sterjev, Paolo Amato. 577-580
• Direct RF sampling mixer with recursive filtering in charge domainKhurram Muhammad, Robert B. Staszewski. 577-580 [doi]
• An improved Wigner distribution synthesis method for separation of multiple nonstationary signalsYichang Tsai, Chung J. Kuo. 577-580 [doi]
• Robust VQ-based digital watermarking for memoryless binary symmetric channelJeng-Shyang Pan, Min-Tsang Sung, Hsiang-Cheh Huang, Bin-Yih Liao. 580-583
• Implementation of Farrow structure based interpolators with subfilters of odd lengthShahed Hagh Ghadam, Djordje Babic, Vesa Lehtinen, Markku Renfors. 581-584 [doi]
• A novel single amplifier architecture for second order noise shapingRahmi Hezar, Oguz Altun. 581-584 [doi]
• A double scroll based true random bit generatorMustak E. Yalcin, Johan A. K. Suykens, Joos Vandewalle. 581-584
• Autonomous Memory Block for reconfigurable computingWim J. C. Melis, Peter Y. K. Cheung, Wayne Luk. 581-584
• Using invisible watermarks to protect visibly watermarked imagesYongjian Hu, Sam Kwong, Jiwu Huang. 584-587
• An ensemble average approach to remove adverse effects on power spectral estimation due to sampling jittersTaikang Ning. 585-588 [doi]
• Compact Hamming-Comparator-based rank order filter for digital VLSI and FPGA implementationsVolnei A. Pedroni. 585-588
• Post-processing of data generated by a chaotic pipelined ADC for the robust generation of perfectly random bitstreamsStefano Poli, Sergio Callegari, Riccardo Rovatti, Gianluca Setti. 585-588
• A 2.5 milliwatt SOS CMOS receiver for optical interconnectAlyssa B. Apsel, Zhongtao Fu. 588-591
• A novel CFAR intrusion detection method using chaotic stochastic resonanceDi He, Henry Leung. 589-592
• A low-power fractional decimator architecture for an IF-sampling dual-mode receiverRiku Uusikartano, Jarmo Takala. 589-592 [doi]
• An improved algorithmic ADC clocking schemeMin Gyu Kim, Gil-Cho Ahn, Un-Ku Moon. 589-592 [doi]
• Application performance of elements in a floating-gate FPAATyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson. 589-592
• Active substrates for optoelectronic interconnectDonald M. Chiarulli, Steven P. Levitan, Jason D. Bakos, Charlie Kuznia. 592-595
• Optimal chaos shift keying communications with correlation decodingJi Yao. 593-596
• A novel FPGA architectural implementation of pipelined thinning algorithmPei-Yung Hsiao, Chun-Ho Hua, Chien-Chen Lin. 593-596
• Analysis and compensation of nonlinearity mismatches in time-interleaved ADC arraysChristian Vogel, Gernot Kubin. 593-596 [doi]
• New complex-arithmetic heterodyne filterGrace Y. Cho, Louis G. Johnson, Michael A. Soderstrand. 593-596 [doi]
• Integrated radioactive thin films for sensing systemsAmit Lal, Hui Li, Hang Guo. 596-599
• An efficient FPGA implementation of advanced encryption standard algorithmShuenn-Shyang Wang, Wan-Sheng Ni. 597-600
• Multi-step analog-to-digital converters with trapping windowMasaaki Naka, Toshimichi Saito. 597-600 [doi]
• A group-blind multiuser receiver for MC-CDMA systemsHui Cheng, S. C. Chan. 597-600 [doi]
• Widening the dynamic range of the readout integration circuit for uncooled microbolometer infrared sensorsAlexander Belenky, Alexander Fish, Shy Hamami, Vadim Milrud, Orly Yadid-Pecht. 600-603
• Design of a 1.8 V 4.9 ~ 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loadsYin-Lung Lu, Yi-Cheng Wu, Kyung-Wan Yu, Wei-Li Chen, M. Frank Chang. 601-604 [doi]
• Exponentially tapered H-tree clock distribution networksMagdy A. El-Moursy, Eby G. Friedman. 601-604
• Generalized correlation-delay-shift-keying scheme for noncoherent chaos-based communication systemsWai Man Tam, Francis C. M. Lau, C. K. Michael Tse. 601-604
• Switching methods for linear turbo equalizationSeok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer. 601-604 [doi]
• A new mesochronous clocking scheme for synchronization in SoCBehzad Mesgarzadeh, Christer Svensson, Atila Alvandpour. 605-608
• Blind MLSE based on the matched filter estimation using the CMAIzzet Ozcelik, Izzet Kale, Buyurman Baykal. 605-608 [doi]
• A low-power DC-7-GHz SOI CMOS distributed amplifierErtan Zencir, Ahmet Tekin, Numan Sadi Dogan, Ercument Arvas. 605-608 [doi]
• An improved multiple access scheme for chaos-based digital communications using adaptive receiversWai Man Tam, Francis C. M. Lau, C. K. Michael Tse. 605-608
• On distributions of multiple access interference for spread spectrum communication systems using M-phase spreading sequences of Markov chainsHiroshi Fujisaki. 609-612
• The impact of clock gating schemes on the power dissipation of synthesizable register filesMatthias Müller, Andreas Wortmann, Sven Simon, Michael Kugel, Tim Schoenauer. 609-612
• Bandwidth enhancement of multi-stage amplifiers using active feedbackM. Reza Samadi, Aydin I. Karsilayan, José Silva-Martínez. 609-612 [doi]
• Equalization of OFDM systems in time-varying channels using frequency domain redundancyShaoping Chen, Tianren Yao. 609-612 [doi]
• Fast adaptive component weighted cepstrum pole filtering for speaker identificationArthur L. Swanson, Ravi P. Ramachandran, Steven H. Chin. 612-615
• Pulse shaping and SIR-energy trade-off in chaos-based asynchronous DS-CDMARiccardo Rovatti, Gianluca Setti, Gianluca Mazzini. 613-616
• FPGA architectures for real-time 2D/3D FIR/IIR plane wave filtersArjuna Madanayake, Leonard T. Bruton, Chris Comis. 613-616 [doi]
• A novel non-uniform distributed amplifierAhmad Yazdi, Payam Heydari. 613-616 [doi]
• A loudness enhancement technique for speechMarc A. Boillot, John G. Harris. 616-618
• Time borrowing and clock skew scheduling effects on multi-phase level-sensitive circuitsBaris Taskin, Ivan S. Kourtev. 617-620
• Markovian SS codes imply inversion-free code acquisition in asynchronous DS/CDMA systemsNobuoki Eshima, Yutaka Jitsumatsu, Tohru Kohda. 617-620 [doi]
• A 0.1-12 GHz fully differential CMOS distributed amplifier employing a feedforward distortion cancellation techniqueZiad El-Khatib, Leonard MacEachern, Samy A. Mahmoud. 617-620 [doi]
• Usable speech detection using a context dependent Gaussian mixture model classifierRobert E. Yantorno, Brett Y. Smolenski, Ananth N. Iyer, Jashmin K. Shah. 619-623
• Gain/bandwidth programmable PA control loop for GMS/GPRS quad-band applicationsPaolo Cusinato, Stefano Cipriani, Guglielmo Sirna, Gianni Puccio, Eric Duvivier. 621-624 [doi]
• A reusable IP FFT core for DSP applicationsEvaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis. 621-624 [doi]
• A new dual pumping circuit without body effects for low supply voltageMing-Chih Hsieh, Zheng-Hong Wang, Hongchin Lin, Yen-Tai Lin. 621-624
• A practical algorithm for turbo-decoding enhancementDejan Spasov, Gian Mario Maggio, Ljupco Kocarev. 621-624
• A fully symmetrical sense amplifier for non-volatile memoriesFerdinando Bedeschi, Edoardo Bonizzoni, Osama Khouri, Claudio Resta, Guido Torelli. 625-608
• An integrated linear RF power detectorSuhas Kulhalli, Sumantra Seth, Shih-Tsang Fu. 625-628 [doi]
• VLSI processor architecture for real-time GA processing and PE-VLSI designTetsuya Imai, Masaya Yoshikawa, Hidekazu Terai, Hironori Yamauchi. 625-628
• Mixed signal aspects of behavioral modeling and simulationGabriel Popescu, Leonid B. Goldgeisser. 628-631
• An extended generalized sidelobe canceller in time and frequency domainZhu Liang Yu, Meng Hwa Er. 629-632 [doi]
• Knowledge- and optimization-based design of RF power amplifiersJoão Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert. 629-632 [doi]
• Analysis of Internet topology dataJohnson Chen, Ljiljana Trajkovic. 629-632
• Static divided word matching line for low-power Content Addressable Memory designKuo-Hsing Cheng, Chia-Hung Wei, Shu-Yu Jiang. 629-632
• Behavioural modelling of analogue faults in VHDL-AMS - a case study