Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators - researchr publication

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Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli. Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators. In ISCAS (4). pages 1076-1079, 2004. [doi]

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