The following publications are possibly variants of this publication:
- A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulatorsFriedel Gerfers, Maurits Ortmanns, P. Schmitz, Yiannos Manoli, Kian Min Soh. icecsys 2003: 958-961 [doi]
- Clock jitter insensitive continuous-time /spl Sigma//spl Delta/ modulatorsMaurits Ortmanns, Friedel Gerfers, Yiannos Manoli. icecsys 2001: 1049-1052 [doi]
- FIR DACs in CT Incremental Delta-Sigma ModulatorsMohamed A. Mokhtar, Patrick Vogelmann, Ahmed Abdelaal, John G. Kauffman, Maurits Ortmanns. iscas 2020: 1-5 [doi]