A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators

Friedel Gerfers, Maurits Ortmanns, P. Schmitz, Yiannos Manoli, Kian Min Soh. A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators. In Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2003, Sharjah, United Arab Emirates, December 14-17, 2003. pages 958-961, IEEE, 2003. [doi]

Abstract

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