Abstract is missing.
- Si technology in the Internet EraDennis D. Buss. 1-4 [doi]
- Circuits and signal processing: accomplishments and future trendsSanjit K. Mitra. 5 [doi]
- Technology tradeoffs in the design of high performance analog to digital convertersEric Soenen. 7-11 [doi]
- Power management systems on silicon for portable equipmentMario Paparo. 13-18 [doi]
- An optimally self-biased threshold-voltage extractorSiew Kuok Hoon, Ugur Çilingiroglu. 19-22 [doi]
- Second order MASH Δ ΣFDM-solution with adaptive improvementsMonica Finsrud, Mats Høvin, Tor Sverre Lande. 23-26 [doi]
- A novel wide-band CMOS current amplifying cell and its application in power supply current monitoringSrdjan Dragic, Igor M. Filanovsky, Martin Margala. 27-30 [doi]
- Design and optimization of a low jitter clock-conversion PLL for SONET/SDH optical transmittersJohan D. van der Tang, Cicero S. Vaucher. 31-34 [doi]
- The low power baseband processing parts of a novel dual mode DECT/GSM terminalChristos Drosos, Chrissavgi Dre, Dimitris Metafas, Dimitrios Soudris, Spyros Blionas. 35-38 [doi]
- Efficient sine evaluation architecture for direct digital frequency synthesisLuca Fanucci, Roberto Roncella, Roberto Saletti. 39-42 [doi]
- A difference detector PFD for low jitter PLLKuo-Hsing Cheng, Tse-Hua Yao, Shu-Yu Jiang, Wei-Bin Yang. 43-46 [doi]
- Phase error determination in GMSK modulated fractional-N PLLL. Camino, Serge Ramet, Jean-Baptiste Begueret, Yann Deval, Pascal Fouillat. 47-50 [doi]
- A hardware efficient direct digital frequency synthesizerFlorean Curticapean, Jarkko Niittylahti. 51-54 [doi]
- Fully integrated CMOS phase-locked loop with 30 MHz to 2 GHz locking range and 35 ps jitterChao Xu, Winslow Sargeant, Kenneth R. Laker, Jan Van der Spiegel. 55-58 [doi]
- Decreasing the minimal sample period for recursive filters implemented using distributed arithmeticOscar Gustafsson, Lars Wanhammar. 59-62 [doi]
- Estimation of samples of the derivative of a signal based on the signal difference derivativeEwa Hermanowicz. 63-66 [doi]
- A regularized digital filtering technique for the simultaneous reconstruction of a function and its derivativesMarcelino Lázaro, Ignacio Santamaría, Carlos Pantaleón. 67-70 [doi]
- Implementation of bit-parallel lattice wave digital filters with increased maximal sample rateHenrik Ohlsson, Oscar Gustafsson, Håkan Johansson, Lars Wanhammar. 71-74 [doi]
- Multi-window recursive adaptive neural filtersAdrian Burian, Jukka Saarinen, Pauli Kuosmanen. 75-78 [doi]
- Dynamical intelligent network based on group representation theoryHisato Fujisaka, Maki Akita, Mititada Morisue. 79-82 [doi]
- Wavelet transform as a preprocessing method for neural classification of passive sonar signalsJosé Manoel de Seixas, D. O. Damazio, P. S. R. Diniz, W. Soares-Fillho. 83-86 [doi]
- Asynchronous event redirecting in bio-inspired communicationPhilipp Häfliger. 87-90 [doi]
- Time-frequency analysis as a tool for improving neural detectors for low probability of false alarmPilar Jarabo Amores, Manuel Rosa-Zurera, Francisco López-Ferreras, Manuel Utrilla-Manso. 91-94 [doi]
- IC design automation from circuit level optimization to retargetable layoutXu Jingnan, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca. 95-98 [doi]
- Analog system design problem formulation on the basis of control theoryAlexander Zemliak. 99-102 [doi]
- Fault tolerant unicast routing algorithm based on parallel branching method for faulty hypercubeSalih Günes, Nihat Yilmaz, Ercan Yaldiz. 103-106 [doi]
- An efficient and precise design method to optimize device areas in mismatch and flicker-noise sensitive analog circuitsChristian Paulus, Ralf Brederlow, Ulrich Kleine, Roland Thewes. 107-111 [doi]
- Automatic methodology for placing the guard rings into chip layout to prevent latchup in CMOS IC'sMing-Dou Ker, Hsin-Chin Jiang, Jeng-Jie Peng, Tzay-Luen Shieh. 113-116 [doi]
- Investigations of on-line/off-line tests for sensorsMichael Fischell, Walter Anheier. 117-120 [doi]
- Stabilization of power consumption of the heater of a micromachined silicon gas flow sensorA. A. Nassiopoulos, G. Kaltsas, A. G. Nassiopoulou. 121-124 [doi]
- The design of CMOS real-time motion-direction detection chip with BJT-based silicon-retina sensors and correlation-based motion detection algorithmChung-Yu Wu, Kuan-Hsun Huang, Li-Ju Lin. 125-128 [doi]
- CMOS microsystem front-end for microtesla resolution magnetic field measurementVincent Frick, Luc Hébrard, Philippe Poure, Francis Braun. 129-132 [doi]
- Fully differential CMOS programmable analogue sensor interface based on fully differential multiple differences amplifiersAntónio J. Gano, Nuno F. Especial. 133-136 [doi]
- Boost-type power factor correction system with three-level sigma-delta modulationEnrico Dallago, Marco Passoni, Giuseppe Venchi. 137-140 [doi]
- Control strategy of a solar power inverter (analysis of a seventh order system)Karl H. Edelmoser, Felix A. Himmelstoss. 141-144 [doi]
- Sensorless position estimation using asymmetries in A.C. machinesCyril Spiteri Staines, Joseph Cilia. 145-148 [doi]
- Minimum settling time voltage regulation of single-phase PFC convertersPredrag Ninkovic, Zarko Janda. 149-152 [doi]
- Performance of power converters at cryogenic temperaturesMalik Elbuluk, Scott Gerber, Ahmad Hammoud, Richard L. Patterson. 153-156 [doi]
- New approach to analog filters and group delay equaliser transfer function designJan Vondras, Pravoslav Martinek. 157-160 [doi]
- The real-frequency technique applied to a narrow band MMIC active filter with transmission zero at finite frequenciesEric Kerhervé, Mathieu Hazouard, Pierre Jarry. 161-164 [doi]
- New high-Q band-pass filter configuration using current controlled current conveyor based all-pass filtersAli Toker, Ece Olcay Günes, Serdar Özoguz. 165-168 [doi]
- A simple design technique for multiple resonance networksAntônio Carlos M. de Queiroz. 169-172 [doi]
- A sampled-analog rank-order-filter architectureUgur Çilingiroglu, Luthuli Edem Dake. 173-176 [doi]
- Multirate digital squarer architecturesFengqi Yu, Alan N. Willson Jr.. 177-180 [doi]
- A comparative study of the behavior of NMOS and CMOS digital circuits under substrate noiseRadu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman. 181-184 [doi]
- Programmable logic using a SET electron boxRoelof H. Klunder, Jaap Hoekstra. 185-188 [doi]
- A single latch, high speed double-edge triggered flip-flop (DETFF)Troy A. Johnson, Ivan S. Kourtev. 189-192 [doi]
- New design of squarer circuits using Booth encoding and folding techniquesAntonio G. M. Strollo, Ettore Napoli, Davide De Caro. 193-196 [doi]
- A method to determine the thermal dependence of large and small signal equivalent circuit parameters of GaAs FETsMarcello Pesare, Agostino Giorgio, Anna Gina Perri. 197-200 [doi]
- Nonlinear effects of RF interference in MOS operational amplifiersFranco L. Fiori, Paolo Stefano Crovetti. 201-204 [doi]
- A topological approach for determining the uniqueness of the DC solutions in MOS-transistor circuitsArturo Sarmiento-Reyes, Luis Hernández-Martínez, Héctor Vázquez-Leal. 205-208 [doi]
- Feedback amplifiers: a simplified analysis of harmonic distortion in the frequency domainGaetano Palumbo, Salvatore Pennisi. 209-212 [doi]
- Real time image processing with reconfigurable hardwareMiguel A. Vega-Rodríguez, Juan M. Sánchez-Pérez, Juan Antonio Gómez Pulido. 213-216 [doi]
- VLSI-based parallel architecture for block-matching motion estimation in low bit-rate video codingDonglai Xu, John Bentley. 217-220 [doi]
- A FIFO-based architecture for high speed image compressionA. Masoudnia, Hamid Sarbazi-Azad, Said Boussakta. 221-224 [doi]
- An SIMD architecture for texture mappingWael M. Badawy. 225-228 [doi]
- A parallel 3D DCT architecture for the compression of integral 3D imagesA. Aggoun, I. Jalloh. 229-232 [doi]
- Fast half-swing inter-plane circuits for clocked NOR-NOR PLAsChua-Chin Wang, Chih-Chiang Chiu, Yu-Tsung Chien. 233-236 [doi]
- Logic optimization of circuits with pre-defined internal don't caresJ. C. Rau, J. H. Wang, S.-C. Chang. 237-240 [doi]
- Synthesis of data transmission circuits starting from behavioral HW descriptionsWalter Lange, Wolfgang Rosenstiel. 241-244 [doi]
- I/O buffer placement methodology for ASICsJoseph N. Kozhaya, Sani R. Nassif, Farid N. Najm. 245-248 [doi]
- Distributed evolutionary design of constant-coefficient multipliersD. Chen, Takafumi Aoki, Naofumi Homma, Tatsuo Higuchi 0001. 249-252 [doi]
- Optimised reconfigurable MAC processor architectureMarios Iliopoulos, Theodore Antonakopoulos. 253-258 [doi]
- Integer division in residue number systemBadreddine Rejeb, Heiko Henkelmann, Walter Anheier. 259-262 [doi]
- Fast residue arithmetic multipliers based on signed-digit number systemShugang Wei, Kensuke Shimizu. 263-266 [doi]
- Defect-tolerance design of the high-speed RSA encryption processor with built-in table for residue calculation of redundant binary numbersNobuhiro Tomabechi, Teruki Ito. 267-271 [doi]
- Bit-level architectures for Montgomery's multiplicationOmar Nibouche, Ahmed Bouridane, Mokhtar Nibouche. 273-276 [doi]
- Unequal processing gain for JPEG2000 image transmission in a CDMA environmentMarco Grangetto, Enrico Magli, Gabriella Olmo. 277-280 [doi]
- MPEG-4 Main Profile decoder partitioning with respect to bit stream processingKilian A. Jacob. 281-284 [doi]
- Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architecturesKostas Masselos, Francky Catthoor, A. Kakarudas, Costas E. Goutis, Hugo De Man. 285-288 [doi]
- Benchmark the software based MPEG-4 video codecWeiguo Zheng, Ishfaq Ahmad, Ming-Lei Liou. 289-292 [doi]
- Current mode AB class WTA circuitKrzysztof Wawryn, Bogdan Strzeszewski. 293-296 [doi]
- Modeling and simulation of low-power and low-voltage delta-sigma modulatorsAna Rusu, Serban Lungu. 297-300 [doi]
- Collapse of lost solution and chaos in a driven piecewise linear Rayleigh oscillatorIsao Hishinuma. 301-304 [doi]
- Evolution of SI circuit performances with technological advancesPatricia Desgreys, Patrick Loumeau. 305-308 [doi]
- Method for testing and characterization of analog-digital systemsValery Zagursky. 309-312 [doi]
- About linearization of broadband amplifier by feedback (new opportunity of the well known method)Yuri Bruck. 313-316 [doi]
- Design of polysilicon TFT operational amplifier for analog TFT AMLCD driverChun Lai Yiu, Philip K. T. Mok. 317-320 [doi]
- Successful design of cascaded continuous-time ΣΔ modulatorsMaurits Ortmanns, Friedel Gerfers, Lourans Samid, Yiannos Manoli. 321-324 [doi]
- A two-step folder for a high-speed CMOS folding-and-interpolating ADCSang Chan Han, Bum Soo Suh, Soo-Won Kim. 325-328 [doi]
- A novel BJT output stage for SAW driversKari Stadius, Petri Järviö, Kari Halonen. 329-332 [doi]
- A new architecture of CCK modem based on iterative differential-modulation and phase-detectionTae-Ho Kim, Chang Kon Kim, Jong-Wha Chong. 333-336 [doi]
- A 1.5 V 23 MHz low power FGMOS filterEsther Rodríguez-Villegas, Adoración Rueda, Alberto Yúfera. 337-340 [doi]
- Dynamic behavior of dielectric resonator antennasBoris V. Lvov, V. Yu. Petrunkin. 341-344 [doi]
- A ratio-independent algorithmic pipeline analog-to-digital converterShingo Hatanaka, Kenji Taniguchi 0001. 345-348 [doi]
- A novel CMOS charge-pump circuit with positive feedback for PLL applicationsEsdras Juárez-Hernández, Alejandro Díaz-Sánchez. 349-352 [doi]
- An optimised design of an improved voltage triplerMing Zhang 0007, Nicolas Llaser, Francis Devos. 353-356 [doi]
- Implementation of current mode circuits for programmable neural networkKrzysztof Wawryn, Andrzej Mazurek. 357-360 [doi]
- Layout design on multi-finger MOSFET for on-chip ESD protection circuits in a 0.18-μm salicided CMOS processMing-Dou Ker, Che-Hao Chuang, Wen-Yu Lo. 361-364 [doi]
- Current conveyor based universal biquad filterMaria Cristina Piccirilli. 365-368 [doi]
- Fast CMOS current driver for IrDA - applicationsJens Egerer, Rainer Rodenheber, Michael Reinhold, Hans Hauer. 369-372 [doi]
- Associated resistive and discrete circuits in the qualitative analysis of networks of distributed and lumped circuitsAntonio Maffucci, Giovanni Miano. 373-376 [doi]
- A mixed mode perceptron cell for VLSI neural networksFausto Camboni, Maurizio Valle. 377-380 [doi]
- The influence of model parameters on accurate IMD simulations in HBTsPhillip K. Wong, Branimir Pejcinovic. 381-384 [doi]
- A small sized lateral trench electrode IGBT having improved latch-up and breakdown characteristics for power IC systemEy-Goo Kang, Seung-Hyun Moon, Man Young Sung. 385-388 [doi]
- Influence of local matching effects on the accuracy of a sequential A/D-converterA. Dollberg, Jürgen Oehm, R. Wunderlich, K. Schumacher. 389-392 [doi]
- A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correctionJorge Guilherme, João C. Vital, José E. Franca. 393-396 [doi]
- A distributed transducer system for functional electrical stimulationGunnar Gudnason, Jannik Hammel Nielsen, Erik Bruun, Morten Haugland. 397-400 [doi]
- High frequency threshold improvement of electro-static micro-relaysG. I. Efremov, N. I. Mukhurov. 401-404 [doi]
- A smart "single line" pixel sensor for industrial visionEric Senn, D. Emzivat, Eric Martin 0001. 405-408 [doi]
- Low supply voltage, low quiescent current, ULDO linear regulatorG. Bontempo, Tiziana Signorelli, Francesco Pulvirenti. 409-412 [doi]
- A 0.3 V floating-gate differential amplifier input stage with tunable gainYngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin. 413-416 [doi]
- Delay/slope budgeting for clock buffer cell designQing K. Zhu, Tim W. Chan. 417-420 [doi]
- A CMOS low power voltage controlled oscillator with split-path controllerKuo-Hsing Cheng, Lin-Jiunn Tzou, Wei-Bin Yang, Shyh-Shyuan Sheu. 421-424 [doi]
- A current-mode CMOS RMS-DC converter for very low-voltage applicationsAntonio J. López-Martín, Alfonso Carlosena. 425-428 [doi]
- A framework for a wavelet-based high level environmentMokhtar Nibouche, Ahmed Bouridane, Omar Nibouche. 429-432 [doi]
- Implementation of the one dimensional discrete cosine transform using the residue number systemPedro G. Fernández, Javier Ramírez 0001, Antonio García 0001, Luis Parrilla 0001, Antonio Lloris-Ruíz. 433-436 [doi]
- Sampling frequency offset estimation and correction in OFDM systemsMaja Sliskovic. 437-440 [doi]
- ECG compression algorithm based on coding and energy compaction of the wavelet coefficientsMohammed Abo-Zahhad, Bashar A. Rajoub. 441-444 [doi]
- Design of M-band optimal orthonormal wavelet of compact support for signal de-noising by using the principle of complexity regularizationA. Das, Uday B. Desai, Priya P. Vaidya. 445-448 [doi]
- Statistical properties of number sequences generated by 1D chaotic maps considered as a potential source of pseudorandom number sequencesMieczyslaw Jessa, Marcin Walentynowicz. 449-455 [doi]
- Theoretical connection between PN-sequences and chaos makes simple FPGA pseudo-chaos sources possibleA. Mozsáry, L. Azzinari, K. Król, Veikko Porra. 457-460 [doi]
- Experiments on chaotic circuits and crypted data transmissionGiovanna Lombardo, Giuseppe Lullo, Rosalia Zangara. 461-464 [doi]
- Control of chaotic behavior by parameter commutation methodologyA. Ingeborg Mahla, Álvaro Torres. 465-468 [doi]
- An efficient VLSI architecture for HMM-based speech recognitionJer Min Jou, Yeu-Horng Shiau, Chen-Jen Huang. 469-472 [doi]
- Voice over IP over satellite linksHaitham S. Cruickshank, Antonio Sánchez-Esguevillas, Zhili Sun, Belén Carro. 473-476 [doi]
- A programmable application-specific VLSI architecture for speech recognitionJia-Ching Wang, Jhing-Fa Wang, An-Nan Suen, Yu-Sheng Weng. 477-480 [doi]
- Phoneme classification in hardware implemented neural networksEdward Gatt, Joseph Micallef, Paul Micallef, Edward Chilton. 481-484 [doi]
- GSM to G.729 speech transcoderShu-Min Tsai, Jar-Ferr Yang. 485-488 [doi]
- Requirements for embedded data converters in an ADSL communication systemHerman J. Casier. 489-492 [doi]
- Design of high-speed analog-to-digital interface in digital technologiesKoen Uyttenhove, Michiel Steyaert. 493-496 [doi]
- Design considerations for high resolution pipeline ADCs in digital CMOS technologyJorge Guilherme, Pedro M. Figueiredo, P. Azevedo, G. Minderico, A. Leal, João C. Vital, José E. Franca. 497-500 [doi]
- A High-performance sigma-delta ADC for ADSL applications in 0.35 μm CMOS digital technologyRocío Del Río, José Manuel de la Rosa, Fernando Medeiro, Belén Pérez-Verdú, Ángel Rodríguez-Vázquez. 501-504 [doi]
- Design solutions for low-power digital filtersRoberto Rossi, Guido Torelli, Valentino Liberali. 505-508 [doi]
- Fast multipole method based extraction of PEEC parametersGiulio Antonini. 509-512 [doi]
- Cascaded coefficient number systems lead to FIR filters of striking computational efficiencyJeffrey O. Coleman. 513-516 [doi]
- n±1 addersCostas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos. 517-520 [doi]
- Distributed arithmetic radix-2 butterflies for FPGAT. Sansaloni, A. Perez-Pascual, Javier Valls. 521-524 [doi]
- Recursive structure for linear filtering using number theoretic transformMrinmoy Bhattacharya, Jaakko Astola. 525-528 [doi]
- Object-oriented high level synthesis based on SystemCEike Grimpe, Frank Oppenheimer. 529-534 [doi]
- Architectural synthesis of digital signal processing applications dedicated to submicron technologiesEmmanuel Casseau, Christophe Jégo, Eric Martin 0001. 535-538 [doi]
- Data-driven process decomposition for circuit synthesisCatherine G. Wong, Alain J. Martin. 539-546 [doi]
- A divider-multiplier high level synthesis library element for DSP applicationsV. Rodellar, M. A. Sacristán, Agustín Álvarez 0001, Antonio Diaz, Virginia Peinado, Pedro Gómez 0001. 547-550 [doi]
- Programmable current mode circuitsAndrzej Mazurek, Krzysztof Wawryn. 553-556 [doi]
- Self-calibrating linear OTAs exemplified in a current mode ADCR. Wunderlich, R. Frieg, A. Dollberg, K. Schumacher. 557-560 [doi]
- Lead compensation to improve the stability of a two stage rail-to-rail CMOS opampJean-François Delage, Mohamad Sawan. 561-564 [doi]
- Accurate current mirror with high output impedanceKuo-Hsing Cheng, Chi-Che Chen, Chun-Fu Chung. 565-568 [doi]
- A new differential current conveyor and its application as a four quadrant multiplierHesham F. Hamed, Ahmed El-Gaafary, Mostafa S. A. El-hakeem. 569-572 [doi]
- An area-saving 3-dimensional decoder structure for ROMsChua-Chin Wang, Ya-Hsin Hsueh, Ying-Pei Chen. 573-576 [doi]
- A dynamic thermal management circuit for system-on-chip designsHerming Chiueh, Jeffrey Draper, John Choma Jr.. 577-580 [doi]
- Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functionsSnorre Aunet, Yngvar Berg, Øivind Næss, Trond Sæther. 581-584 [doi]
- New embedded memory architecture for enhanced yield, performance and power consumptionBoris Polianskikh, Zeljko Zilic. 585-588 [doi]
- Two-dimensional array layout for NMOS 4-phase dynamic logicMakoto Furuie, Takao Onoye, Shuji Tsukiyama, Isao Shirakawa. 589-592 [doi]
- A combinatorial generalization of the Stirling Numbers of the second kindBruno Cernuschi-Frías. 593-596 [doi]
- N latency 2N I/O-bandwidth 2D-array matrix multiplication algorithmAbdelkrim Kamel Oudjida, Sabrina Titri, M. Hamarlain. 597-600 [doi]
- A method for solving stochastic differential equation with random coefficientsTakenobu Matsuura, Toshio Shinozaki. 601-604 [doi]
- Automated flowgraph analysis using Matlab and MapleTimo Rahkonen, Marko Neitola. 605-608 [doi]
- A system-level analysis of robustness by randomised algorithmsCesare Alippi. 609-613 [doi]
- Unsupervised classification for the triple parity stringsTony Y. T. Chan. 615-618 [doi]
- A new light-activated CMOS retinal-pulse generation circuit without external power supply for artificial retinal prosthesesChung-Yu Wu, Li-Ju Lin, Kuan-Hsun Huang. 619-622 [doi]
- Autoassociative memory using refractory period of neurons and its on-line learningMikio Oda, Hiromi Miyajima. 623-626 [doi]
- Hardware radial basis functions neural networks for phoneme recognitionEdward Gatt, Joseph Micallef, Edward Chilton. 627-630 [doi]
- Associative amplitude modulation with built-in noise immunityRon Spencer, Huseyin Dinc, Taner Sumesaglam. 631-636 [doi]
- A switching current-mode power stage based on sigma-delta modulationEnrico Dallago, Marco Passoni, Gabriele Sassone, Giuseppe Venchi. 637-641 [doi]
- Matched filters for identifying failed fuel rods in nuclear reactorsJosé Manoel de Seixas, Fabio P. Freeland, William Soares-Filho. 643-646 [doi]
- Design of an electric vehicle for the Maltese islandsJoseph Cilia, Cyril Spiteri Staines, Victor Buttigieg, Cedric Caruana, Maurice Apap. 647-650 [doi]
- Multipulse high power factor rectifier applying a novel current injection networkZarko Janda, Predrag V. Pejovic. 651-654 [doi]
- Analysis of noise parameters sensitivities of microwave amplifiers with respect to biasA. El-Mehdi, Gabriel Vasilescu, Georges Alquié, Victor Fouad Hanna. 655-658 [doi]
- A CMOS piece-wise linear A/D converter for linearizing sensor characteristicsAntonio J. López-Martín, Mikel Zuza, Alfonso Carlosena. 659-662 [doi]
- A scintillator-coated phototransistor pixel sensor with dark current cancellationM. A. Abdallah, E. Dubaric, H. E. Nilsson, C. Fröjdh, C. S. Petersson. 663-667 [doi]
- Adaptive interference reduction in nerve cuff electrode recordingsIasonas F. Triantis, Robert Rieger, John Taylor 0002, Nick Donaldson. 669-672 [doi]
- Electrical characterization and modeling of thin-film humidity sensorsA. Bonavita, A. Caddemi, Nicola Donato, P. Accordino, S. Galvagno, G. Neri. 673-676 [doi]
- A 14-bit 12 μV/LSB resolution A/D converter for sensors using only digital circuit with low-pass filter effectTakamoto Watanabe, Tamotsu Mizuno, Yasuaki Makino. 677-680 [doi]
- A learning automata-based bus arbitration scheme for scalable shared-medium ATM switchesMohammad S. Obaidat, Georgios I. Papadimitriou, Andreas S. Pomportsis. 681-684 [doi]
- A new class of Smith predictors for network congestion controlPeter H. Bauer, Mihail L. Sichitiu, Russ Ernst, Kamal Premaratne. 685-688 [doi]
- 2.5-Gb/s 0.35-μm CMOS ICs for optic-fiber transceiverZhigong Wang, X. H. Chen, R. Tao, T. Huang, J. Feng, T.-T. Xie, H. T. Chen. 689-692 [doi]
- Self-routing crossbar switch with internal contention resolutionChristoph Heer, Andreas Kirstädter, Christian Sauer. 693-696 [doi]
- Design of linear-phase variable 2-D FIR digital filters using matrix-array decompositionTian-Bo Deng. 697-700 [doi]
- Asynchronous multipliers with variable-delay countersGianluca Cornetta, Jordi Cortadella. 701-705 [doi]
- A contention-alleviated static keeper for high-performance domino logic circuitsShang-Jyh Shieh, Jinn-Shyan Wang, Yuan-Hsun Yeh. 707-710 [doi]
- Design of low-power domino circuits using multiple supply voltagesShang-Jyh Shieh, Jinn-Shyan Wang. 711-714 [doi]
- A new method to implement CORDIC algorithmM. W. Kharrat, Mourad Loulou, N. Masmoudi, Lotfi Kamoun. 715-718 [doi]
- Delay estimation of SCL gates with output bufferMassimo Alioto, Gaetano Palumbo, Salvatore Pennisi. 719-722 [doi]
- VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuitsStefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, Giovanni Staino. 723-727 [doi]
- Training in the use of Java smart cards for embedded applicationsLes T. Walczowski, F. Deravi. 729-732 [doi]
- Distributed simulation of VHDL using JiniJ. Casal-Gimenez, Les T. Walczowski. 733-736 [doi]
- Optimized design of high fan-in multiplexers using switches with driving capabilityMassimo Alioto, Gaetano Palumbo. 737-740 [doi]
- A reconfigurable 2D convolver for real-time SAR imagingAntonio G. M. Strollo, Ettore Napoli, Davide De Caro, Giacinto Paolo Saggese. 741-744 [doi]
- Test pattern generator for hybrid testing of combinational circuitsDavide De Caro, Nicola Mazzocca, Ettore Napoli, Giacinto P. Saggese, Antonio G. M. Strollo. 745-748 [doi]
- New test pattern generation units for NPSF oriented memory built-in self testA. Chrisanthopoulos, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni. 749-752 [doi]
- Unconditional maximum likelihood approach for near-field source localizationErdinç Çekli, Hakan Ali Çirpan. 753-756 [doi]
- An instrument with a DSP for monitoring human biological parametersA. Buizza, Giuseppe Coldani, Giovanni Danese, R. Gandolfi, P. Ghidetti, Remo Lombardi. 757-760 [doi]
- Synchronization in DMT based VDSL modemsAbdelmonaem Lakhzouri, Markku Renfors. 761-764 [doi]
- A 1.2 V 500 MHz 32-bit carry-lookahead adderKuo-Hsing Cheng, Wen-Shiuan Lee, Yung-Chong Huang. 765-768 [doi]
- Memory efficient pipelined Viterbi decoder with look-ahead trace backJung-Gi Baek, Sang-Hun Yoon, Jong-Wha Chong. 769-772 [doi]
- Analysis of clock distribution networks in the presence of crosstalk and groundbounceManuel Salim Maza, Mónico Linares Aranda. 773-776 [doi]
- Designing low-power energy recovery adders based on pass transistor logicDimitrios Soudris, Vasilis F. Pavlidis, Adonios Thanailakis. 777-780 [doi]
- Power exploration of parallel embedded architectures implementing data-reuse transformationsNikolaos Kavvadias, A. Zanikopoulos, Ch. Voliotidis, Stamatiki Kougia, Alexander Chatzigeorgiou, Nikolaos D. Zervas, Spiros Nikolaidis. 781-784 [doi]
- Formal verification of digital circuits by 3-valued simulationAyman M. Wahba, Einar J. Aas. 785-788 [doi]
- Fault-tolerance-based computation of global functions in asynchronous distributed systemsHossam M. A. Fahmy, Abu Bakr A. ElHefnawy. 789-793 [doi]
- A gate-level timing model for SOI circuitsMehrdad Shahriari, Farid N. Najm. 795-798 [doi]
- VLSI architectures for blind equalization based on fractional-order statisticsVassilis Paliouras, J. Dagres, Panagiotis Tsakalides, Thanos Stouraitis. 799-802 [doi]
- Conditional techniques for low power consumption flip-flopsNikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija. 803-806 [doi]
- Five new high-performance multiplexer-based 1-bit full adder cellsAbdulkarim Al-Sheraidah, Bassem Alhalabi, Hung Tien Bui. 807-810 [doi]
- Synthesis of companding systems by component to component substitution: an alternative methodCarlos Aristoteles De la Cruz-Blas, Antonio J. López-Martín, Alfonso Carlosena. 811-814 [doi]
- Low-sensitivity, low-power fourth-order band-pass active-RC allpole filter using impedance taperingDrazen Jurisic, George S. Moschytz, Neven Mijat. 815-818 [doi]
- m-C biquad filtersSlawomir Koziel, Stanislaw Szczepanski. 819-822 [doi]
- High frequency CMOS Gm-C bandpass filter with automatic on-chip tuningH. Elhallabi, Youcef Fouzar, Mohamad Sawan. 823-826 [doi]
- Counting up of linear lumped parameter systems and their unified representationToshihiko Yamawaki. 827-831 [doi]
- Fuzzy rank ordering for robust multiuser detection in non-Gaussian channelsA. Company, Ana I. Pérez-Neira. 833-836 [doi]
- On-line digital correction of the harmonic distortion in analog-to-digital convertersUdaykiran Eduri, Franco Maloberti. 837-840 [doi]
- Semi-custom VLSI chip implementation of a new two-dimensional separable median filtering algorithmAhmad A. Hiasat. 841-844 [doi]
- Calibration of mismatch errors in time interleaved ADCsMikael Karlsson Rudberg. 845-848 [doi]
- A low temperature pipelined analog-to-digital converterTuula K. Mäkiniemi, Paavo J. Kosonen. 849-852 [doi]
- MSB steps calibration algorithm for a pipelined ADCPaavo J. Kosonen, Tero T. Suhonen. 853-857 [doi]
- A successive approximation A/D converter with 16 bit 200 kS/s in 0.6 μm CMOS using self calibration and low power techniquesHarald Neubauer, Thomas Desel, Hans Hauer. 859-862 [doi]
- D/A conversion: amplitude and time error mapping optimizationKonstantinos Doris, Chieh Lin, Domine Leenaerts, Arthur H. M. van Roermund. 863-866 [doi]
- A high throughput 2-dimensional DCT/IDCT architecture for real-time image and video systemJen-Shiun Chiang, Yi-Fang Chiu, Teng-Hung Chang. 867-870 [doi]
- On the digital watermarking in JPEG 2000M. A. Suhail, Mohammad S. Obaidat. 871-874 [doi]
- JPEG 2000: finite precision representation and hardware implicationsMaurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni. 875-878 [doi]
- New iterative algorithms and architectures of modular multiplication for cryptographyOmar Nibouche, Ahmed Bouridane, Mokhtar Nibouche. 879-882 [doi]
- On placement and routing of wafer scale memoryLi-An Sung, Iris Hui-Ru Jiang, Yoh-Wen Chang, Jing-Yang Jou, Jiin-Chuan Wu, Tai-Sheng Feng. 883-887 [doi]
- A study on the relationship between initial node-edge pairs entropy and mincut circuit partitioningKuo-Hsing Cheng, Shun-Wen Cheng. 889-893 [doi]
- HDL software development and hardware prototyping of a system-on-chip for an active filter controllerAnna Labbé, Philippe Poure, Fabrice Aubépart, Francis Braun. 895-898 [doi]
- A general class of passive macromodels for efficient sensitivity analysis of high-speed distributed interconnects with nonlinear terminationsAnestis Dounavis, Ramachandra Achar, Michel S. Nakhla. 899-902 [doi]
- Circuit partitioning techniques for power estimation using the full set of input correlationsAna T. Freitas, Arlindo L. Oliveira. 903-907 [doi]
- Threshold-gates in arithmetic circuitsChristian Burwick, Marc Thomas, Jan Dienstuhl, Karl F. Goser. 909-912 [doi]
- A novel dynamically programmable arithmetic array using code division multiple access busBoon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi 0001. 913-916 [doi]
- A code transformation-based methodology for improving I-cache performanceNikolaos D. Liveris, Nikolaos D. Zervas, A. P. Kakaroudas, Costas E. Goutis. 917-920 [doi]
- Design of a cycle-efficient 64b/32b integer divider using a table-sharing methodChua-Chin Wang, Po-Ming Lee, Jun-Jie Wang, Chenn-Jung Huang. 921-924 [doi]
- An area-efficient interpolation filter using block structureKyu Ha Lee, Dae Hee Youn, Chungyong Lee. 925-928 [doi]
- Stand-by low-power architecture in a 3 V-only 2-bit/cell 64-Mbit flash memoryRino Micheloni, Ilaria Motta, Osama Khouri, Guido Torelli. 929-932 [doi]
- TM: methodology and architecture of a nonvolatile-memory technology development testchipD. Montanari, D. DeShazo, G. Yeric. 933-936 [doi]
- Modular architecture for a family of multilevel 256/192/128/64 Mbit 2-bit/cell 3 V-only NOR flash memory devicesAndrea Silvagni, Stefano Zanardi, Alessandro Manstretta, Marco Scotti, Luca Crippa, Giancarlo Ragone, Giuseppe Fusillo, Giovanni Campardo, Osama Khouri, Marcello Stefanelli. 937-940 [doi]
- A new flash memory sense amplifier in 0.18 μm CMOS technologyA. Chrisanthopoulos, Yiannis Moisiadis, A. Varagis, Y. Tsiatouhas, Angela Arapoyanni. 941-944 [doi]
- Optimized programming of multilevel flash EEPROMsRoberto Versari, David Esseni, Gianluca Falavigna, Massimo Lanzoni, Bruno Riccò. 945-948 [doi]
- A ready-to-use design procedure for operational transconductance amplifiers that minimizes power consumptionAndrea Gerosa. 949-952 [doi]
- Comparative study of low-voltage performance of standard-cell flip-flopsShang Xue, Bengt Oelmann. 953-957 [doi]
- Current-controlled policies for battery-driven dynamic power managementGiuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino. 959-962 [doi]
- Systematic design of high-linearity current-mode integrators for low-power continuous-time ΣΔ modulatorsHassan Aboushady, Marie-Minerve Louërat. 963-966 [doi]
- Class AB output stages for low voltage CMOS opamps with accurate quiescent current control by means of dynamic biasingAntonio Torralba 0002, Ramón G. Carvajal, Jaime Ramírez-Angulo, Jon N. Tombs, Juan Antonio Gómez Galán. 967-970 [doi]
- A new approach for on-line optimisation of a fuzzy controllerJoseph Haggège, Mohamed Benrejeb, Pierre Borne. 971-975 [doi]
- A fuzzy controller for step-up DC/DC convertersM. Criscione, Gianluca Giustolisi, A. Lionetto, M. Muscarà, Gaetano Palumbo. 977-980 [doi]
- Parameter identification of a DC motor: an experimental approachSamer S. Saab, Raed Abi Kaed-Bey. 981-984 [doi]
- Stability of discrete time-variant linear delay systems and applications to network controlMihail L. Sichitiu, Peter H. Bauer. 985-989 [doi]
- A reconfigurable linear feedback shift register (LFSR) for the Bluetooth systemParis Kitsos, Nicolas Sklavos 0001, Nikolaos D. Zervas, Odysseas G. Koufopavlou. 991-994 [doi]
- A special march test to detect delay coupling faults for RAMsMohamed Azimane, Antonio Lloris Ruiz. 995-999 [doi]
- On-line calibration for non-linearity reduction of delay-locked delay-linesFederico Baronti, Luca Fanucci, Diego Lunardini, Roberto Roncella, Roberto Saletti. 1001-1005 [doi]
- Non-robust delay test pattern generation based on stuck-at TPGVolker Meyer, Walter Anheier, Arne Sticht. 1007-1010 [doi]
- ESD test methods on integrated circuits: an overviewMing-Dou Ker, Jeng-Jie Peng, Hsin-Chin Jiang. 1011-1014 [doi]
- Analytical current model for dual-gate MOSFETKoray Karahaliloglu, Günhan Dündar. 1015-1019 [doi]
- Demonstration of speed enhancements on an industrial circuit through application of non-zero clock skew schedulingDimitrios Velenis, Kevin T. Tang, Ivan S. Kourtev, Victor Adler, Franklin Baez, Eby G. Friedman. 1021-1025 [doi]
- An accurate poles-zeros analysis for large-scale analog and digital circuitsJosef Dobes. 1027-1030 [doi]
- Delay-sensitive power estimation at the register-transfer levelDavide Bruni, G. Olivieri, Alessandro Bogliolo, Luca Benini. 1031-1034 [doi]
- A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuitsSnorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther. 1035-1038 [doi]
- Cascaded feedforward sigma-delta modulator for wide bandwidth applicationsJen-Shiun Chiang, Pou-Chu Chou, Teng-Hung Chang. 1039-1042 [doi]
- Design and implementation of an audio analog to digital converter using oversampling techniquesSonia Boujelben, Chiheb Rebai, Dominique Dallet, Philippe Marchegay. 1043-1047 [doi]
- Clock jitter insensitive continuous-time /spl Sigma//spl Delta/ modulatorsMaurits Ortmanns, Friedel Gerfers, Yiannos Manoli. 1049-1052 [doi]
- Design of a wideband transmit delta-sigma DACMarko Neitola, Arto Kivi, Timo Rahkonen. 1053-1056 [doi]
- Differentially randomized quantization in sigma-delta analog-to-digital convertersHolger Berndt, Hans-Joachim Jentschel. 1057-1060 [doi]
- DSP implementation of 3D sound localization algorithm for monaural sound sourceNoriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa. 1061-1064 [doi]
- Power reduction for multimedia applications through data-reuse memory explorationM. Kougia, Alexander Chatzigeorgiou, Spiridon Nikolaidis. 1065-1068 [doi]
- On the numerical accuracy of CORDIC-based frequency offset compensation in burst oriented OFDM systemsLukusa D. Kabulepa, Tideya Kella, Thilo Pionteck, Ralf Ludewig, Jürgen Becker 0001, J. Plechinger, Manfred Glesner. 1069-1072 [doi]
- Fast algebraic convolution for prime power lengthsReiner Creutzburg, Torsten Minkwitz. 1073-1076 [doi]
- Deterministic maximum likelihood method for the localization of near-field sources: algorithm and performance analysisErdinç Çekli, Hakan A. Çirpan. 1077-1080 [doi]
- Modeling of fractional-N division frequency synthesizers with SIMULINK and MATLABS. Brigati, F. Francesconi, A. Malvasi, A. Pesucci, M. Poletti. 1081-1084 [doi]
- Saturation recovery technique for high-order bandpass switched capacitor ΣΔ modulatorsPaolo Cusinato, F. Pasolini, Fabrizio Stefani, Andrea Baschirotto. 1085-1088 [doi]
- Analog CMOS implementation of feature detection operators for automatic real-time optical character recognition systemsDaniele D. Caviglia, M. Tosato, M. Mazzucco, Gian Marco Bo, Maurizio Valle. 1089-1093 [doi]
- Low-voltage low-power novel CCII topologies and applicationsGiuseppe Ferri, Nicola Carlo Guerrini. 1095-1098 [doi]
- A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalizationAndrea Gerosa, Andrea Neviani, Andrea Xotta, Gian Antonio Mian. 1099-1102 [doi]
- Integrated front-end preamplifier dedicated to ultrasonic receiversRobert Chebli, Abdallah Kassem, Mohamad Sawan. 1103-1106 [doi]
- Maximizing bandwidth in CCII for wireless optical applicationsLuis Nero Alves, Rui L. Aguiar. 1107-1110 [doi]
- A 1.8 GHz CMOS low-noise amplifierCarl James Debono, Franco Maloberti, Joseph Micallef. 1111-1114 [doi]
- A feedforward compensation scheme for high gain wideband amplifiersBharath Kumar Thandri, José Silva-Martínez, Franco Maloberti. 1115-1118 [doi]
- Low voltage programmable current mode circuit for onset detection in a sound signalIvan Grech, Joseph Micallef, Tanya Vladimirova. 1119-1122 [doi]
- A 1.0 GHz clock generator design with a negative delay using a single-shot locking methodChua-Chin Wang, Yih-Long Tseng, Rong-Sui Kao. 1123-1126 [doi]
- High data rate synchronizers operating at low speedAntonio D. Reis, José F. Rocha, Atílio Gameiro, José P. Carvalho. 1127-1130 [doi]
- T-integration employing reverse-active vertical npn'sPhanumas Khumsat, Apisak Worapishet, Alison J. Payne. 1131-1134 [doi]
- An efficient 0-1 linear programming for optimal PLA foldingKaamran Raahemifar, Majid Ahmadi. 1135-1138 [doi]
- State-space equations of regular and strictly topologically degenerate linear lumped time-invariant networks: the implicit tree-tableau methodAntonino M. Sommariva. 1139-1141 [doi]
- Perturbation methods for canceling interference in CDMA systemsChun Chian Lu. 1143-1146 [doi]
- Generalized symmetric variablesMalgorzata Chrzanowska-Jeske. 1147-1150 [doi]
- Signal identification by nonlinear optimizationPavel Popela, Jaroslav Sklenar. 1151-1154 [doi]
- Vector analysis of dielectric waveguides using magnetic field finite elements with Helmholtz equationM. Silveira, J. A. J. Ribeiro, W. N. A. Pereira, A. Gopinath. 1155-1160 [doi]
- A new variable step LMS algorithm for transform domainRadu Ciprian Bilcu, Pauli Kuosmanen, Karen O. Egiazarian. 1161-1164 [doi]
- A step-size control for adaptive filters using a sign-based estimation of the normalized excess mean-squared errorDani Lippuner, August N. Kaelin. 1165-1169 [doi]
- A selective compression algorithm for SAR images based on irregular and adaptive samplingDavide Avagnina, Fabio Dovis, Letizia Lo Presti, Paolo Mulassano. 1171-1174 [doi]
- Adaptive filtering of cyclostationary interference from speechOlli Vuorinen, Tapio Seppänen, Jorma Lilleberg, Timo Kolehmainen, Juha Röning. 1175-1178 [doi]
- Space-time diversity applied to single-user environments and MIMO transmission channelsAntonio Pascual-Iserte, Miguel Angel Lagunas Hernandez, Ana I. Pérez-Neira. 1179-1182 [doi]
- An implantable CMOS amplifier for nerve signalsJannik Hammel Nielsen, Torsten Lehmann. 1183-1186 [doi]
- Design of a portable microprocessor-based stimulator for the recreation of impaired gastrointestinal motilityY. Lin, L. E. Turner, Martin P. Mintchev. 1187-1190 [doi]
- SPU based microrobots: a new approach to the robotic worldEnric Montane, Manel Puig-Vidal, Jaime López-Sánchez, Pere Lluís Miribel-Català, Sebastià A. Bota, Josep Samitier. 1191-1194 [doi]
- The mechanical and control system design of a dexterous robotic gripperC. M. Seguna, M. A. Saliba. 1195-1201 [doi]
- A new approach for mobile manipulator motion controlFoudil Abdessemed, Eric Monacelli, Khier Benmahammed. 1203-1207 [doi]
- An improved transmission energy transformer for a non invasive rechargeable battery to artificial organsToshi Hiro Nishimura, Tetsuji Eguchi, Akira Kubota, Kazuhiko Hamamoto, Masao Saito. 1209-1214 [doi]
- VLSI implementation of CRC-32 for 10 Gigabit EthernetTomas Henriksson, Henrik Eriksson, Ulf Nordqvist, Per Larsson-Edefors, Dake Liu. 1215-1218 [doi]
- Block turbo codes: towards implementationSylvie Kerouédan, Patrick Adde. 1219-1222 [doi]
- VLSI implementation for low density parity check decoderW. L. Lee, Angus Wu. 1223-1226 [doi]
- Reconfigurable coprocessor based JPEG 2000 implementationMaurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni. 1227-1230 [doi]
- A fast CRC implementation on FPGA using a pipelined architecture for the polynomial divisionFabrice Monteiro, Abbas Dandache, Amine M'sir, Bernard Lepley. 1231-1234 [doi]
- Effects of analogue ACS implementation errors on the modified feedback decoding algorithmAndreas Demosthenous, John Taylor 0002. 1235-1238 [doi]
- High-density microelectrode arrays for electrophysiological activity imaging of neuronal networksL. Berdondini, T. Overstolz, N. F. de Rooij, M. Koudelka-Hep, M. Wäny, P. Seitz. 1239-1242 [doi]
- A comparison between feature extraction methods of an electronic nose responseCosimo Distante, Pietro Siciliano. 1243-1246 [doi]
- Leakage localisation with a mobile robot carrying chemical sensorsMichael Wandel, Udo Weimar, Achim J. Lilienthal, Andreas Zell. 1247-1250 [doi]
- On algorithm for phoneme speech recognition using nonlinear signal decompositionAlexander M. Krot, Polina P. Tkachova, Helena B. Minervina. 1251-1254 [doi]
- Regularization of neural networks for improved load forecasting in power systemKrzysztof Siwek, Stanislaw Osowski. 1255-1258 [doi]
- An ultra high-speed compressor for packet networksIoannis Papaefstathiou. 1259-1263 [doi]
- A proof of the non-existence of universal nonlinearities for blind signal separationHeinz Mathis. 1265-1268 [doi]
- The bifurcation structure of fractional-harmonic entrainments in the forced Rayleigh oscillatorMunehisa Sekikawa, Naohiko Inaba, Tetsuya Yoshinaga, Hiroshi Kawakami. 1269-1272 [doi]
- New natural selection process and chromosome encoding for the design of multiplierless lattice QMF using genetic algorithmYa Jun Yu, Yong Ching Lim. 1273-1276 [doi]
- On the analysis of three-conductor transmission lines using Park transformationSonia Leva, Adriano Paolo Morando. 1277-1280 [doi]
- Development of a vision based object classification system for an industrial robotic manipulatorRasit Köker, Cemil Öz, Abdullah Ferikoglu. 1281-1284 [doi]
- Bipartite graph labeling for the subcircuit recognition problemNikolay Rubanov. 1285-1288 [doi]
- Aperiodic filter analysis and design by symbolic computationAldo Balestrino, G. Marani, Luca Sani. 1289-1292 [doi]
- A transform domain approach in blocking effect detectionGeorge A. Triantafyllidis, Dimitrios Tzovaras, M. G. Strinztis. 1293-1296 [doi]
- Bifurcation and chaos in the piecewise-linear forced Duffing-van der Pol oscillator with a diodeNaohiko Inaba, Kazutaka Tsukamoto, Tetsuro Endo. 1297-1300 [doi]
- A neural expert system concept applied to diagnosticsJózef Drabarek, Robert Wirski. 1301-1304 [doi]
- A wire segment reassignment algorithm for minimizing crosstalk for strait-type river routingJong-Sheng Cherng, Sao-Jie Chen. 1305-1308 [doi]
- Self-adaptive polling protocols for wireless LANs: a learning-automata-based approachPetros Nicopolitidis, Georgios I. Papadimitriou, Andreas S. Pomportsis. 1309-1312 [doi]
- Paradys: A scalable infrastructure for parallel circuit simulationJean-Louis Lafitte. 1313-1325 [doi]
- A control strategy for electromagnetic near and far field calculationJan Wilk, H. Röhm. 1327-1330 [doi]
- Open graphics system for 3D-mapping validation on roboticsJ. V. Catret, M. Mellado, D. Puig. 1331-1334 [doi]
- An iterative method for instantaneous frequency estimationAydin Akan, Mahmut Yalçin, Luis F. Chaparro. 1335-1338 [doi]
- Reducing the constructive interference by selective adaptation in the frequency domainLongji Wang, Victor E. DeBrunner, Linda DeBrunner. 1339-1342 [doi]
- Windows in a non-autonomous circuit with symmetryTetsuya Miyoshi, Munehisa Sekikawa, T. Sato, Naohiko Inaba, Y. Nishio. 1343-1346 [doi]
- Fractal image coding combined with subband decompositionKatsutoshi Sawada, Shin-ya Nagai, Eiji Nakamura. 1347-1350 [doi]
- Chaotic and hyperchaotic synchronization of two nonautonomous and nonlinear electric circuitsIoannis M. Kyprianidis, Ioannis N. Stouboulos. 1351-1354 [doi]
- Text analysis for the Slovenian text-to-speech systemTomaz Sef. 1355-1358 [doi]
- Neural system for military target detectionAdnan Khashman. 1359-1362 [doi]
- Improvements to SPIHT for lossy image codingJian Zhu, Stuart Lawson. 1363-1366 [doi]
- Electrocardiogram characterization using wavelet analysisK. Mokrani, A. Alliche. 1367-1370 [doi]
- Self-synchronizing watermark detection for MPEG-4 objectsNikolaos V. Boulgouris, Filippos D. Koravos, Michael G. Strintzis. 1371-1374 [doi]
- Chip design of a bandpass sigma-delta modulatorSau-Mou Wu, Rou-Yi Liu, Wei Wu, Che-Pin Chen. 1375-1378 [doi]
- Novel noise shaping of cascaded sigma-delta modulator for wide bandwidth applicationsJen-Shiun Chiang, Teng-Hung Chang, Pou-Chu Chou. 1379-1382 [doi]
- On the stability of high order Sigma-Delta modulatorsValeri Mladenov, Hans Hegt, Arthur H. M. van Roermund. 1383-1386 [doi]
- Analysis of bandpass Sigma-Delta conversion in OFDM systemsAntonio Moschitta, Dario Petri. 1387-1390 [doi]
- A comparative study of digital ΣΔ modulators for fractional-N synthesisKeliu Shu, Edgar Sánchez-Sinencio, Franco Maloberti, Udaykiran Eduri. 1391-1394 [doi]
- An improved delay compensation technique for digital clock recovery loopsFulvio Spagna. 1395-1398 [doi]
- Rapid prototyping of biorthogonal discrete wavelet transforms on FPGAsMokhtar Nibouche, Ahmed Bouridane, Omar Nibouche. 1399-1402 [doi]
- On signal reconstruction from Fourier magnitudeGil Michael, Moshe Porat. 1403-1406 [doi]
- Discrete-time randomized samplingMaya R. Said, Alan V. Oppenheim. 1407-1411 [doi]
- Fast 32-bit digital multiplierKaamran Raahemifar, Majid Ahmadi. 1413-1416 [doi]
- Low-power logic styles for full-adder circuitsJosé M. Quintana, Maria J. Avedillo, Raúl Jiménez, Esther Rodríguez-Villegas. 1417-1420 [doi]
- Comparison of static logic styles for low-voltage digital designMika Kontiala, Mika Kuulusa, Jari Nurmi. 1421-1424 [doi]
- Asynchronous low power VLSI implementation of the International Data Encryption AlgorithmNicolas Sklavos 0001, Odysseas G. Koufopavlou. 1425-1428 [doi]
- On area-efficient low power array multipliersYuke Wang, Yingtao Jiang, Edwin H.-M. Sha. 1429-1432 [doi]
- A novel low power multiplexer-based full adder cellBassem Alhalabi, Abdulkarim Al-Sheraidah. 1433-1436 [doi]
- Maximum power supply noise estimation in VLSI circuits using multimodal genetic algorithmsGeng Bai, Sudhakar Bobba, Ibrahim N. Hajj. 1437-1440 [doi]
- Analysis of superconducting thin film using an approximate model of the current distributionMohamed F. Elkordy, Taha E. Taha, Ahmed Gomaa Radwan. 1441-1444 [doi]
- SPICE model for the single electron tunnel junctionRudie van de Haar, Roelof H. Klunder, Jaap Hoekstra. 1445-1448 [doi]
- An effective procedure for multi-tone steady-state analysis of mixersRobert C. Melville, Hans Georg Brachtendorf. 1449-1453 [doi]
- A practical substrate modeling algorithm with active guardband macromodel for mixed-signal substrate coupling verificationHenry H. Y. Chan, Zeljko Zilic. 1455-1460 [doi]
- A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output currentYngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin. 1461-1464 [doi]
- A 1.5 V CMOS square-root domain filterAntonio J. López-Martín, Alfonso Carlosena. 1465-1468 [doi]
- Antialiasing filtering influences on ADC specifications for radio receiversElizabeth Colin, Patrick Loumeau, Lirida A. B. Naviner, Jean-François Naviner. 1469-1472 [doi]
- Low voltage log domain front end for the extraction of 2-D sound localization cuesIvan Grech, Joseph Micallef, Tanya Vladimirova. 1473-1476 [doi]
- Signal detection and processing of seismic electromagnetic radiation in ELF bandHiroshi Yasukawa, Seiji Adachi, Masayasu Hata, Ichi Takumi. 1477-1480 [doi]
- FPGA based on-line complex-number multipliersA. Perez-Pascual, T. Sansaloni, Javier Valls. 1481-1484 [doi]
- Using a hardware coprocessor for message scheduling in fieldbus-based distributed systemsJosé Alberto Fonseca, Ernesto Martins, Paulo A. C. S. Neves. 1485-1490 [doi]
- A Profit Evaluation System (PES) for logic cores at early design stageShyue-Kung Lu, Tsung-Ying Lee, Cheng-Wen Wu. 1491-1494 [doi]
- Design verification of an 18-million-transistor digital television and media processor chipSantanu Dutta. 1495-1499 [doi]
- A 250-MHz, 32-bit quantum MOS correlator prototypeShriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González, Pinaki Mazumder. 1501-1504 [doi]
- A wind sensor with an integrated low-offset instrumentation amplifierKofi A. A. Makinwa, Johan H. Huijsing. 1505-1508 [doi]
- Angelo Evaluation: application of a multisensor system for psycho-physiological stress detection in working environmentsM. Andersson, A. Avamini, A. Colosimo, Arnaldo D'Amico, F. Davide, Corrado Di Natale, S. Ganci, M. Gutknecht, M. Holmberg, E. Mazzone, M. Nardi, A. Pede, M. Russo, V. Spicacci Minervini, A. Tibuzzi. 1509-1512 [doi]
- A CMOS ASIC for differential read-out of ISFET sensorsL. Ravezzi, David Stoppa, Michele Corrà, G. Soncini, Gian-Franco Dalla Betta, Leandro Lorenzelli. 1513-1516 [doi]
- Study of the damping processes in thickness shear mode resonator chemical sensorsChristian Falconi, Corrado Di Natale, Davide D'Amico, Giuseppe Ferri, Arnaldo D'Amico. 1517-1520 [doi]
- Low-power low-voltage library cells and memoriesChristian Piguet, Jean-Marc Masgonty, Stefan Cserveny, Claude Arm, Pierre-David Pfister. 1521-1524 [doi]
- Low-voltage CMOS current operational amplifier with class AB input stageSalvatore Pennisi. 1525-1528 [doi]
- Low-voltage low-power adaptive biased high-efficiency integrated amplifiersGiuseppe Ferri. 1529-1532 [doi]
- Advances in low-voltage ultra-low-power analog circuit designWouter A. Serdijn, Jan Mulder, Daniel Rocha, Luís Cléber C. Marques. 1533-1536 [doi]
- A capacitance meter based on an oversampling sigma-delta modulator and its application to capacitive sensor interfaceR. Gallorini, Nacer Abouchi. 1537-1540 [doi]
- A CMOS switched capacitor channel select filter for direct conversion UMTS receiverBilal Manaï, Patrick Loumeau. 1541-1544 [doi]
- Design of a CMOS fully differential switched-opamp for SC circuits at very low power supply voltagesJesús Arias, Luis Quintanilla, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda. 1545-1548 [doi]
- Switch sizing for very low-voltage switched-capacitor circuitsMohamed Dessouky, Marie-Minerve Louërat, Andreas Kaiser. 1549-1552 [doi]
- An improved phase clock generator for interleaved and double-sampled switched-capacitor circuitsGabriele Manganaro. 1553-1556 [doi]
- A new initialization technique in designing and testing phases of asynchronous circuitsKaamran Raahemifar, Fei Yuan, Farahnaz A. Mohammadi. 1557-1560 [doi]
- An efficient test vector compression technique based on geometric shapes [system-on-a-chip]Saif al Zahir, Aiman El-Maleh, Esam Khan. 1561-1564 [doi]
- Design of low-power on-line reconfigurable datapaths using self-checking circuitsAthanasios P. Kakarountas, Vasileios Kokkinos, Costas E. Goutis. 1565-1568 [doi]
- A test bed for wireless optical LANsRui L. Aguiar, António R. Tavares, Luis Nero Alves, Rui Valadas, Dinis M. Santos. 1569-1573 [doi]
- Analysis of microwave frequency dividers in harmonic-balance simulatorsA. Anakabe, J. M. Collantes, A. Suárez, J. Jugo, J. Portilla. 1575-1578 [doi]
- Dynamic power of CMOS gates driving lossy transmission linesGregorio Cappuccino, Pasquale Corsonello, Giuseppe Cocorullo, Stefania Perri, Giovanni Staino. 1579-1582 [doi]
- A moment method analysis of SAW interaction in periodic metal-semiconductor structureMohamed F. Elkordy, Taha E. Taha, A. Gomaa. 1583-1586 [doi]
- A new mobility model for pocket implanted quarter micron n-MOSFETs and belowPeter Klein, Steffen Chladek. 1587-1590 [doi]
- Fast characterization of RTL power macromodelsManuela Anton, Ionel Colonescu, Enrico Macii, Massimo Poncino. 1591-1594 [doi]
- A 0.35 μm CMOS DCS front-end with fully integrated VCOEllie Cijvat. 1595-1598 [doi]
- A direct-conversion BiCMOS mixer for GHz applicationsEsa Tiiliharju, Kari Halonen. 1599-1602 [doi]
- Design and implementation of cascade decimation filter for radio communicationsKhaled Grati, Adel Ghazel, Lirida A. B. Naviner, Faker Moatamri. 1603-1606 [doi]
- A 0.35 μm SiGe BiCMOS front end for GSM low IF cellular receiver applicationsLampros Dermentzoglou, George Kamoulakos, Angela Arapoyanni. 1607-1610 [doi]
- Noise contribution in a fully integrated 1-V, 2.5-GHz LNA in CMOS-SOI technologyC. Tinella, Jean-Michel Fournier, J. Haidar. 1611-1614 [doi]
- An integrated pedagogical approach for a switching power supply design: example of fly backPh. Dondon, J. M. Lequertier. 1615-1618 [doi]
- Design of electric filters in MAPLE and through WWW interfaceJ. Bicák, Jirí Hospodka, J. Vrbata, Pravoslav Martínek. 1619-1622 [doi]
- Application boards emulation engineWadih Zaatar, George E. Nasr. 1623-1626 [doi]
- Combinational verification by simulations, SAT and BDDsKatarzyna Radecka, Zeljko Zilic, Karim Khordoc. 1627-1630 [doi]
- AUTODDM: automatic characterization tool for the delay degradation modelJorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carmen Baena Oliva, Manuel Valencia 0001. 1631-1634 [doi]
- A declarative framework for developing parametrised hardware librariesSteve McKeever, Wayne Luk. 1635-1638 [doi]
- Pipelined digital processor for dynamical EIT inverse problem solutionM. Kacarska, Suzana Loskovska. 1639-1642 [doi]