Jan Mulder - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 22 from 22

2017

Session 16 overview: Gigahertz data convertersJan Mulder, Paul Ferguson, Un-Ku Moon. isscc 2017: 274-275 [doi]

2016

Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits ConferenceEdgar Sánchez-Sinencio, Jan Mulder, Antonio Liscidini, Eric A. M. Klumperink, Elad Alon. jssc, 51(12):2803-2807, 2016. [doi]

2015

26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOSJan Mulder, Davide Vecchi, Yi Ke, Stefano Bozzola, Mark Core, Nitz Saputra, Qiongna Zhang, Jeff Riley, Han Yan, Mattia Introini, Sijia Wang, Christopher M. Ward, Jan R. Westra, Jiansong Wan, Klaas Bult. isscc 2015: 1-3 [doi]

2014

A 1.5 mW 68 dB SNDR 80 Ms/s 2 × Interleaved Pipelined SAR ADC in 28 nm CMOSFrank M. L. van der Goes, Christopher M. Ward, Santosh Astgimath, Han Yan, Jeff Riley, Zeng Zeng, Jan Mulder, Sijia Wang, Klaas Bult. jssc, 49(12):2835-2845, 2014. [doi]

11.4 A 1.5mW 68dB SNDR 80MS/s 2× interleaved SAR-assisted pipelined ADC in 28nm CMOSFrank M. L. van der Goes, Christopher M. Ward, Santosh Astgimath, Han Yan, Jeff Riley, Jan Mulder, Sijia Wang, Klaas Bult. isscc 2014: 200-201 [doi]

8.5 A sub-1.75W full-duplex 10GBASE-T transceiver in 40nm CMOSJan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult. isscc 2014: 146-147 [doi]

Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceiversJan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult. cicc 2014: 1-8 [doi]

2011

2010

A Low-Power Capacitive Charge Pump Based Pipelined ADCImran Ahmed, Jan Mulder, David A. Johns. jssc, 45(5):1016-1027, 2010. [doi]

2009

2005

The e-Xperimenteren+ Project: Pool of Remote Experiments and Software EnvironmentJasper Bedaux, Leendert Van Gastel, Piet Blankert, Jan Mulder, Jeroen Verschuur, Wopke Wijngaard. ijoe, 1(2), 2005. [doi]

2004

A 21-mW 8-b 125-MSample/s ADC in 0.09-mm/sup 2/ 0.13-/spl mu/m CMOSJan Mulder, Christopher M. Ward, Chi-Hung Lin, David Kruse, Jan R. Westra, Marcel Lugthart, Erol Arslan, Rudy J. van de Plassche, Klaas Bult, Frank M. L. van der Goes. jssc, 39(12):2116-2125, 2004. [doi]

2001

Advances in low-voltage ultra-low-power analog circuit designWouter A. Serdijn, Jan Mulder, Daniel Rocha, Luís Cléber C. Marques. icecsys 2001: 1533-1536 [doi]

1998

1997

Sign in or sign up to see more results.

runs on WebDSL