Abstract is missing.
- 18.6 A 0.5nJ/pixel 4K H.265/HEVC codec LSI for multi-format smartphone applicationsChi-Cheng Ju, Tsu-Ming Liu, Kun-Bin Lee, Yung-Chang Chang, Han-Liang Chou, Chin-Ming Wang, Tung-Hsing Wu, Hue-Min Lin, Yi-Hsin Huang, Chia-Yun Cheng, Ting-An Lin, Chun-Chia Chen, Yu-Kun Lin, Min-Hao Chiu, Wei-Cing Li, Sheng-Jen Wang, Yen-Chieh Lai, Ping Chao, Chih-Da Chien, Meng-Jye Hu, Peng-Hao Wang, Fu-Chun Yeh, Yen-Chao Huang, Shun-Hsiang Chuang, Lien-Fei Chen, Hsiu-Yi Lin, Ming-Long Wu, Che-Hong Chen, Ryan Chen, H.-Y. Hsu, Kevin Jou. 1-3 [doi]
- 10.6 continuous-time linear equalization with programmable active-peaking transistor arrays in a 14nm FinFET 2mW/Gb/s 16Gb/s 2-Tap speculative DFE receiverPier Andrea Francese, Thomas Toifl, Matthias Braendli, Christian Menolfi, Marcel A. Kossel, Thomas Morf, Lukas Kull, Toke Meyer Andersen, Hazar Yueksel, Alessandro Cevrero, Danny Luu. 1-3 [doi]
- 5.7 A 29nW bandgap reference circuitJongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong June Park, Jae-Yoon Sim. 1-3 [doi]
- F3: Cutting the last wire - Advances in wireless powerMarco Berkhout, Marco Berkhout, Anton Bakker, Christoph Sandner, Wentai Liu, Chin-Ming Hung, Bill Redman-White. 1-2 [doi]
- 21.9 A wearable EEG-HEG-HRV multimodal system with real-time tES monitoring for mental health managementUnsoo Ha, Yongsu Lee, Hyunki Kim, Taehwan Roh, Joonsung Bae, Changhyeon Kim, Hoi-Jun Yoo. 1-3 [doi]
- 23.1 20nm high-K metal-gate heterogeneous 64b quad-core CPUs and hexa-core GPU for high-performance and energy-efficient mobile application processorJungyul Pyo, Youngmin Shin, Hoi-Jin Lee, Sung-il Bae, Min-Su Kim, Kwangil Kim, Ken Shin, Yohan Kwon, Heungchul Oh, Jaeyoung Lim, Dong-Wook Lee, Jongho Lee, Inpyo Hong, Kyungkuk Chae, Heon-Hee Lee, Sung-Wook Lee, Seongho Song, Chunghee Kim, Jin Soo Park, HeeSoo Kim, Sunghee Yun, Ukrae Cho, Jae Cheol Son, Sungho Park. 1-3 [doi]
- 14.4 A 5GHz -95dBc-reference-Spur 9.5mW digital fractional-N PLL using reference-multiplied time-to-digital converter and reference-spur cancellation in 65nm CMOSHyojun Kim, Jinwoo Sang, Hyunik Kim, Youngwoo Jo, Taeik Kim, Hojin Park, Seong-Hwan Cho. 1-3 [doi]
- 24.1 Circuit challenges from cryptographyIngrid Verbauwhede, Josep Balasch, Sujoy Sinha Roy, Anthony Van Herrewege. 1-2 [doi]
- 20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessorsYan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 1-3 [doi]
- 8.2 Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logicWootaek Lim, Inhee Lee, Dennis Sylvester, David Blaauw. 1-3 [doi]
- 21.6 A smart CMOS assay SoC for rapid blood screening test of risk predictionPo-Hung Kuo, Jui-Chang Kuo, Hsiao-Ting Hsueh, Jian-Yu Hsieh, Yi-Chun Huang, Tao Wang, Yen-Hung Lin, Chih-Ting Lin, Yao-Joe Yang, Shey-Shi Lu. 1-3 [doi]
- 11.5 A time-correlated single-photon-counting sensor with 14GS/S histogramming time-to-digital converterNeale A. W. Dutton, Salvatore Gnecchi, Luca Parmesan, Andrew J. Holmes, Bruce Rae, Lindsay A. Grant, Robert K. Henderson. 1-3 [doi]
- EP2: Lost art? Analog tricks and techniques from the mastersTsung-Hsien Lin, Carlo Samori, Richard Schreier, Richard Schreier. 1 [doi]
- 27.5 A 30ppm <80nJ ring-down-based readout circuit for resonant sensorsHui Jiang, Zu-yao Chang, Michiel A. P. Pertijs. 1-3 [doi]
- 24.3 20k-spin Ising chip for combinational optimization problem with CMOS annealingMasanao Yamaoka, Chihiro Yoshimura, Masato Hayashi, Takuya Okuyama, Hidetaka Aoki, Hiroyuki Mizuno. 1-3 [doi]
- 8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigationStephen T. Kim, Yi-Chun Shih, Kaushik Mazumdar, Rinkle Jain, Joseph F. Ryan, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De. 1-3 [doi]
- 25.9 A ±3ppm 1.1mW FBAR frequency reference with 750MHz output and 750mV supplyKannan A. Sankaragomathi, Jabeom Koo, Richard C. Ruby, Brian P. Otis. 1-3 [doi]
- 21.5 A portable micro gas chromatography system for volatile compounds detection with 15ppb of sensitivityTe-Hsuen Tzeng, Chun-Yen Kuo, San-Yuan Wang, Po-Kai Huang, Po-Hung Kuo, Yen-Ming Huang, Wei-Che Hsieh, Shih-An Yu, Yufeng Jane Tseng, Wei-Cheng Tian, Si-Chen Lee, Shey-Shi Lu. 1-3 [doi]
- 8.5 A 16nm auto-calibrating dynamically adaptive clock distribution for maximizing supply-voltage-droop tolerance across a wide operating rangeKeith A. Bowman, Sarthak Raina, Todd Bridges, Daniel Yingling, Hoan Nguyen, Brad Appel, Yesh Kolla, Jihoon Jeong, Francois Atallah, David Hansquine. 1-3 [doi]
- 26.2 A 5.5fJ/conv-step 6.4MS/S 13b SAR ADC utilizing a redundancy-facilitated background error-detection-and-correction schemeMing Ding, Pieter Harpe, Yao-Hong Liu, Benjamin Busze, Kathleen Philips, Harmke de Groot. 1-3 [doi]
- -8 for robust chip authentication using oscillator collapse in 40nm CMOSKaiyuan Yang, Qing Dong, David Blaauw, Dennis Sylvester. 1-3 [doi]
- 10.5 A 5.9pJ/b 10Gb/s serial link with unequalized MM-CDR in 14nm tri-gate CMOSRajeev K. Dokania, Alexandra M. Kern, Mike He, Adam C. Faust, Richard Tseng, Skyler Weaver, Kai Yu, Christiaan Bil, Tao Liang, Frank O'Mahony. 1-3 [doi]
- 4.8 A 28nm x86 APU optimized for power and area efficiencyKathryn Wilcox, David Akeson, Harry R. Fair III, Jim Farrell, Dave Johnson, Guhan Krishnan, Hugh McIntyre, Edward McLellan, Samuel Naffziger, Russell Schreiber, Sriram Sundaram, Jonathan White. 1-3 [doi]
- 10.2 An FSK plastic waveguide communication link in 40nm CMOSWouter Volkaerts, Niels Van Thienen, Patrick Reynaert. 1-3 [doi]
- 1.3 Analog CMOS from 5 micrometer to 5 nanometerWilly Sansen. 1-6 [doi]
- 16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write methodTakanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki. 1-3 [doi]
- 3.7 A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOSTejasvi Anand, Mrunmay Talegaonkar, Ahmed Elkholy, Saurabh Saxena, Amr Elshazly, Pavan Kumar Hanumolu. 1-3 [doi]
- 10.7 A 6.75-to-8.25GHz 2.25mW 190fsrms integrated-jitter PVT-insensitive injection-locked clock multiplier using all-digital continuous frequency-tracking loop in 65nm CMOSAhmed Elkholy, Mrunmay Talegaonkar, Tejasvi Anand, Pavan Kumar Hanumolu. 1-3 [doi]
- 20.10 A 50nW-to-10mW output power tri-mode digital buck converter with self-tracking zero current detection for photovoltaic energy harvestingPo-Hung Chen, Chung-Shiang Wu, Kai-Chun Lin. 1-3 [doi]
- 14.5 A 1.22ps integrated-jitter 0.25-to-4GHz fractional-N ADPLL in 16nm FinFET CM0STsung-Hsien Tsai, Min-Shueh Yuan, Chih-Hsien Chang, Chia-Chun Liao, Chao-Chieh Li, Robert Bogdan Staszewski. 1-3 [doi]
- 19.7 A 79GHz binary phase-modulated continuous-wave radar transceiver with TX-to-RX spillover cancellation in 28nm CMOSDavide Guermandi, Qixian Shi, Alaa Medra, Tomohiro Murata, Wim Van Thillo, André Bourdoux, Piet Wambacq, Vito Giannini. 1-3 [doi]
- 17.1 A 0.6V 1.5GHz 84Mb SRAM design in 14nm FinFET CMOS technologyEric Karl, Zheng Guo, James W. Conary, Jeffrey L. Miller, Yong-Gee Ng, Satyanand Nalam, Daeyeon Kim, John Keane, Uddalak Bhattacharya, Kevin Zhang. 1-3 [doi]
- 9.5 efficient digital quadrature transmitter based on IQ cell sharingHadong Jin, Dongsu Kim, Sangsu Jin, Hankyu Lee, Kyunghoon Moon, Huijung Kim, Bumman Kim. 1-3 [doi]
- 9.3 A transmitter with 10b 128MS/S incremental-charge-based DAC achieving -155dBc/Hz out-of-band noisePedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx. 1-3 [doi]
- 25.4 A 1/f noise upconversion reduction technique applied to Class-D and Class-F oscillatorsMina Shahmohammadi, Masoud Babaie, Robert Bogdan Staszewski. 1-3 [doi]
- 13.3 A 10mW Bluetooth Low-Energy transceiver with on-chip matchingJan Prummel, Michail Papamichail, Michele Ancis, John Willms, Rahul Todi, William Aartsen, Wim Kruiskamp, Johan Haanstra, Enno Opbroek, Soren Rievers, Peter Seesink, Harrie Woering, Chris Smit. 1-3 [doi]
- SC1: Circuit design in advanced CMOS technologies: How to design with lower supply voltagesWim Dehaene. 1-2 [doi]
- 3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOSWoo-seok Choi, Guanghua Shu, Mrunmay Talegaonkar, Yubo Liu, Da Wei, Luca Benini, Pavan Kumar Hanumolu. 1-3 [doi]
- 11.4 A 67, 392-SPAD PVTB-compensated multi-channel digital SiPM with 432 column-parallel 48ps 17b TDCs for endoscopic time-of-flight PETAugusto Carimatto, Shingo Mandai, Esteban Venialgo, Ting Gong, Giacomo Borghi, Dennis R. Schaart, Edoardo Charbon. 1-3 [doi]
- 15.3 A 115dB-DR audio DAC with -61dBFS out-of-band noiseHugo Westerveld, Daniël Schinkel, Ed van Tuijl. 1-3 [doi]
- 16.5 A NEMS-array control IC for sub-attogram gravimetric sensing applications in 28nm CMOS technologyNicolas Delorme, Christophe Le Blanc, Alessandro Dezzani, Mickael Bely, Alexandre Ferret, Simon Laminette, Jerome Roudier, Éric Colinet. 1-3 [doi]
- 19.3 Reconfigurable SDR receiver with enhanced front-end frequency selectivity suitable for intra-band and inter-band carrier aggregationRun Chen, Hossein Hashemi. 1-3 [doi]
- 2.2 A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18um SOI CMOSBarend van Liempd, Benjamin P. Hershberg, Kuba Raczkowski, Saneaki Ariumi, Udo Karthaus, Karl-Frederik Bink, Jan Craninckx. 1-3 [doi]
- 22.3 A 4-to-11GHz injection-locked quarter-rate clocking for an adaptive 153fJ/b optical receiver in 28nm FDSOI CMOSMayank Raj, Saman Saeedi, Azita Emami. 1-3 [doi]
- ES3: How to achieve 1000× more wireless data capacity? 5G?Eric A. M. Klumperink, Sven Mattisson, Vojkan Vidojkovic. 1 [doi]
- 12.9 A fully integrated 6W wireless power receiver operating at 6.78MHz with magnetic resonance couplingKyung-Goo Moti, Filippo Neri, Sungwoo Moon, Pyeongwoo Yeon, Jinhyuck Yu, Youso Cheon, Yong-Seong Roh, MyeongLyong Ko, Byeong-ha Park. 1-3 [doi]
- 15.1 An 85dB-DR 74.6dB-SNDR 50MHZ-BW CT MASH ΔΣ modulator in 28nm CMOSDo-Yeon Yoon, Stacy Ho, Hae-Seung Lee. 1-3 [doi]
- 25.2 A 2.2GHz -242dB-FOM 4.2mW ADC-PLL using digital sub-sampling architectureTeerachot Siriburanon, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa. 1-3 [doi]
- 8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nmKosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov. 1-3 [doi]
- 20.7 A 0.45-to-3V reconfigurable charge-pump energy harvester with two-dimensional MPPT for Internet of ThingsXiaosen Liu, Edgar Sánchez-Sinencio. 1-3 [doi]
- 6.5 25.3μW at 60fps 240×160-pixel vision sensor for motion capturing with in-pixel non-volatile analog memory using crystalline oxide semiconductor FETTakuro Ohmaru, Takashi Nakagawa, Shuhei Maeda, Yuki Okamoto, Munehiro Kozuma, Seiichi Yoneda, Hiroki Inoue, Yoshiyuki Kurokawa, Takayuki Ikeda, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Makoto Ikeda, Shunpei Yamazaki. 1-3 [doi]
- 3 ±0.68psi single-chip wireless pressure sensor for TPMS applicationsManohar Nagaraju, Andrew Lingley, Suresh Sridharan, Jingren Gu, Richard Ruby, Brian P. Otis. 1-3 [doi]
- 12.7 A power-management ASIC with Q-modulation capability for efficient inductive power transmissionMehdi Kiani, Byunghun Lee, Pyungwoo Yeon, Maysam Ghovanloo. 1-3 [doi]
- 4.5 The Xeon® processor E5-2600 v3: A 22nm 18-core product familyWilliam J. Bowhill, Blaine A. Stackhouse, Nevine Nassif, Zibing Yang, Arvind Raghavan, Charles Morganti, Chris Houghton, Dan Krueger, Olivier Franza, Jayen Desai, Jason Crop, Dave Bradley, Chris Bostak, Sal Bhimji, Matt Becker. 1-3 [doi]
- 17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search timeMeng-Fan Chang, Chien-Chen Lin, Albert Lee, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Pei-Ling Tseng, Heng-Yuan Lee, Tzu-Kun Ku. 1-3 [doi]
- 2 11mW single-mixing blocker-tolerant receiver with double-RF N-path filtering, S11 centering, +13dBm OB-IIP3 and 1.5-to-2.9dB NFZhicheng Lin, Pui-In Mak, Rui Paulo Martins. 1-3 [doi]
- 3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOSAli Nazemi, Kangmin Hu, Burak Çatli, Delong Cui, Ullas Singh, Tim He, Zhi Chao Huang, Bo Zhang, Afshin Momtaz, Jun Cao. 1-3 [doi]
- 22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilizationKunzhi Yu, Hao Li, Cheng Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo. 1-3 [doi]
- 6.3 A 45.5μW 15fps always-on CMOS image sensor for mobile and wearable devicesJaehyuk Choi, Jungsoon Shin, Dongwu Kang, Du-Sik Park. 1-3 [doi]
- 19.4 A 2.7-to-3.7GHz rapid interférer detector exploiting compressed sampling with a quadrature analog-to-information converterRabia Tugce Yazicigil, Tanbir Haque, Michael R. Whalen, Jeffrey Yuan, John Wright, Peter R. Kinget. 1-3 [doi]
- 7.3 A 28nm embedded SG-MONOS flash macro for automotive achieving 200MHz read operation and 2.0MB/S write throughput at Ti, of 170°CYasuhiko Taito, Masaya Nakano, Hiromi Okimoto, Daisuke Okada, Takashi Ito, Takashi Kono, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi. 1-3 [doi]
- 21.7 A 0.036mbar circadian and cardiac intraocular pressure sensor for smart implantable lensAchille Donida, Giuseppe Di Dato, Paolo Cunzolo, Marco Sala, Filippo Piffaretti, Paolo Orsatti, Diego Barrettino. 1-3 [doi]
- 25.5 A 320GHz phase-locked transmitter with 3.3mW radiated power and 22.5dBm EIRP for heterodyne THz imaging systemsRuonan Han, Chen Jiang, Ali Mostajeran, Mohammad Emadi, Hamidreza Aghasi, Hani Sherry, Andreia Cathelin, Ehsan Afshari. 1-3 [doi]
- 16.1 An ultra-thin flexible CMOS stress sensor demonstrated on an adaptive robotic gripperYigit Mahsereci, Stefan Sailer, Harald Richter, Joachim N. Burghartz. 1-3 [doi]
- EP1: Moore's law challenges below 10nm: Technology, design and economic implicationsBing Sheu, Kathy Wilcox, A. M. Keshavarzi, Dimitri Antoniadis. 1 [doi]
- 11.7 A multimodality CMOS sensor array for cell-based assay and drug screeningJong Seok Park, Taiyun Chi, Jessica Butts, Tracy Hookway, Todd McDevitt, Hua Wang. 1-3 [doi]
- 2.6 Class-0: A highly linear class of power amplifiers in 0.13μm CMOS for WCDMA/LTE applicationsAhmed Farouk Aref, Renato Negra, Muhammad Abdullah Khan. 1-3 [doi]
- 25.1 A highly-digital frequency synthesizer using ring-oscillator frequency-to-digital conversion and noise cancellationColin Weltin-Wu, Guobi Zhao, Ian Galton. 1-3 [doi]
- 21.1 A 79pJ/b 80Mb/s full-duplex transceiver and a 42.5μW 100kb/s super-regenerative transceiver for body channel communicationHyunwoo Cho, Hyunki Kim, Minseo Kim, Jaeeun Jang, Joonsung Bae, Hoi-Jun Yoo. 1-3 [doi]
- 26.6 A 5GS/S 150mW 10b SHA-less pipelined/SAR hybrid ADC in 28nm CMOSMassimo Brandolini, Young Shin, Karthik Raviprakash, Tao Wang, Rong Wu, Hemasundar Mohan Geddada, Yen-Jen Ko, Yen Ding, Chun-Sheng Huang, Wei-Ta Shin, Ming-Hung Hsieh, Wei-Te Chou, Tianwei Li, Ayaskant Shrivastava, Yi-Chun Chen, Juo-Jung Hung, Giuseppe Cusmai, Jiangfeng Wu, Mo M. Zhang, Greg Unruh, Ardie Venes, Hung Sen Huang, Chun-Ying Chen. 1-3 [doi]
- 3.1 A 28Gb/s multi-standard serial-link transceiver for backplane applications in 28nm CMOSBo Zhang, Karapet Khanoyan, Hamid Hatamkhani, Haitao Tong, Kangmin Hu, Siavash Fallahi, Kambiz Vakilian, Anthony Brewster. 1-3 [doi]
- 2.5 A 2-to-6GHz Class-AB power amplifier with 28.4% PAE in 65nm CMOS supporting 256QAMWanxin Ye, Kaixue Ma, Kiat Seng Yeo. 1-3 [doi]
- 21.3 A 6.45μW self-powered IoT SoC with integrated energy-harvesting power management and ULP asymmetric radiosAlicia Klinefelter, Nathan E. Roberts, Yousef Shakhsheer, Patricia González, Aatmesh Shrivastava, Abhishek Roy, Kyle Craig, Muhammad Faisal, James Boley, Seunghyun Oh, Yanqing Zhang, Divya Akella, David D. Wentzloff, Benton H. Calhoun. 1-3 [doi]
- 10.3 A 7.5mW 7.5Gb/s mixed NRZ/multi-tone serial-data transceiver for multi-drop memory interfaces in 40nm CMOSKiarash Gharibdoust, Armin Tajalli, Yusuf Leblebici. 1-3 [doi]
- 5.8 A digitally assisted single-point-calibration CMOS bandgap voltage reference with a 3σ inaccuracy of ±0.08% for fuel-gauge applicationsGerhard Maderbacher, Stefano Marsili, Mario Motz, Thomas Jackum, Johannes Thielmann, Henrik Hassander, Herbert Gruber, Florian Hus, Christoph Sandner. 1-3 [doi]
- 17.2 A 64kb 16nm asynchronous disturb current free 2-port SRAM with PMOS pass-gates for FinFET technologiesHidehiro Fujiwara, Li-wen Wang, Yen-Huei Chen, Kao-Cheng Lin, Dar Sun, Shin-Rung Wu, Jhon-Jhy Liaw, Chih-Yung Lin, Mu-Chi Chiang, Hung-Jen Liao, Shien-Yang Wu, Jonathan Chang. 1-3 [doi]
- 4.7 A 409GOPS/W adaptive and resilient domino register file in 22nm tri-gate CMOS featuring in-situ timing margin and error detection for tolerance to within-die variation, voltage droop, temperature and agingJaydeep P. Kulkarni, Carlos Tokunaga, Paolo A. Aseron, Trang Nguyen, Charles Augustine, James Tschanz, Vivek De. 1-3 [doi]
- 5.9 A 37μW dual-mode crystal oscillator for single-crystal radiosDanielle Griffith, James Murdock, Per Torstein Røine, Thomas Murphy. 1-3 [doi]
- 2 1V capacitance-to-digital converter based on period modulationYuming He, Zu-yao Chang, Lukasz Pakula, Saleh Heidary Shalmany, Michiel A. P. Pertijs. 1-3 [doi]
- 7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rateJae-Woo Im, Woo-Pyo Jeong, Doo-Hyun Kim, Sangwan Nam, Dong-Kyo Shim, Myung-Hoon Choi, Hyun-Jun Yoon, Dae-Han Kim, Youse Kim, Hyun Wook Park, Dong-Hun Kwak, Sang-Won Park, Seok Min Yoon, Wook-Ghee Hahn, Jin-Ho Ryu, Sang-Won Shim, Kyung-Tae Kang, Sung Ho Choi, Jeong-Don Ihm, Young-Sun Min, In-Mo Kim, Doosub Lee, Ji-Ho Cho, Ohsuk Kwon, Ji-Sang Lee, Moosung Kim, Sang-Hyun Joo, Jae-Hoon Jang, Sang Won Hwang, Dae-Seok Byeon, Hyang-Ja Yang, Ki Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi. 1-3 [doi]
- 12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systemsSung Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon. 1-3 [doi]
- 26.1 A 1mW 71.5dB SNDR 50MS/S 13b fully differential ring-amplifier-based SAR-assisted pipeline ADCYong Lim, Michael P. Flynn. 1-3 [doi]
- 18.3 A 0.5V 54μW ultra-low-power recognition processor with 93.5% accuracy geometric vocabulary tree and 47.5% database compressionYouchang Kim, Injoon Hong, Hoi-Jun Yoo. 1-3 [doi]
- 4.1 22nm Next-generation IBM System z microprocessorJames D. Warnock, Brian W. Curran, John Badar, Gregory Fredeman, Donald W. Plass, Yuen H. Chan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Frank Malgioglio, Guenter Mayer, Christopher J. Berry, Michael Wood, Yiu-Hing Chan, Mark D. Mayo, John Isakson, Charudhattan Nagarajan, Tobias Werner, Leon J. Sigal, Ricardo Nigaglioni, Mark Cichanowski, Jeffrey A. Zitz, Matthew M. Ziegler, Tim Bronson, Gerald Strevig, Daniel Dreps, Ruchir Puri, Douglas Malone, Dieter F. Wendel, Pak-kin Mak, Michael A. Blake. 1-3 [doi]
- 16.3 Flexible thin-film NFC tags powered by commercial USB reader device at 13.56MHzKris Myny, Brian Cobb, Jan-Laurens P. J. van der Steen, Ashutosh Tripathi, Jan Genoe, Gerwin H. Gelinck, Paul Heremans. 1-3 [doi]
- 9.6 A 5.3GHz 16b 1.75GS/S wideband RF Mixing-DAC achieving IMD<-82dBc up to 1.9GHzElbert Bechthum, Georgi I. Radulov, Joost Briaire, Govert Geelen, Arthur H. M. van Roermund. 1-3 [doi]
- rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supplyJoeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta. 1-3 [doi]
- 11.1 A time-divided spread-spectrum code based 15pW-detectable multi-channel fNIRS IC for portable functional brain imagingJongKwan Choi, Jae-Myoung Kim, Gunpil Hwang, Jaehyeok Yang, MinGyu Choi, Hyeon-Min Bae. 1-3 [doi]
- 7.4 A covalent-bonded cross-coupled current-mode sense amplifier for STT-MRAM with 1T1MTJ common source-line structure arrayChankyung Kim, Keewon Kwon, Chulwoo Park, Sungjin Jang, Joosun Choi. 1-3 [doi]
- 22.1 A 25Gb/s burst-mode receiver for rapidly reconfigurable optical networksAlexander Rylyakov, Jonathan Proesel, Sergey V. Rylov, Benjamin G. Lee, John F. Bulzacchelli, Abhijeet Ardey, Benjamin D. Parker, Michael P. Beakes, Christian W. Baks, Clint Schow, Mounir Meghelli. 1-3 [doi]
- 4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processorPenny Li, Jinuk Luke Shin, Georgios Konstadinidis, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister. 1-3 [doi]
- 19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakageDirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta. 1-3 [doi]
- 20.6 Electromagnetic vibration energy harvester interface IC with conduction-angle-controlled maximum-power-point tracking and harvesting efficiencies of up to 90%Joachim Leicht, Mohammad Amayreh, Christian Moranz, Dominic Maurath, Thorsten Hehn, Yiannos Marioli. 1-3 [doi]
- 7.1 A low-power 64Gb MLC NAND-flash memory in 15nm CMOS technologyMario Sako, Yoshihisa Watanabe, Takao Nakajima, Jumpei Sato, Kazuyoshi Muraoka, Masaki Fujiu, Fumihiro Kouno, Michio Nakagawa, Masami Masuda, Koji Kato, Yuri Terada, Yuki Shimizu, Mitsuaki Honma, Akihiro Imamoto, Tomoko Araya, Hayato Konno, Takuya Okanaga, Tomofumi Fujimura, Xiaoqing Wang, Mai Muramoto, Masahiro Kamoshida, Masatoshi Kohno, Yoshinao Suzuki, Tomoharu Hashiguchi, Tsukasa Kobayashi, Masashi Yamaoka, Ryuji Yamashita. 1-3 [doi]
- 2 using 1.1nH PCB-trace inductorsChristopher Schaef, Kapil Kesarwani, Jason T. Stauth. 1-3 [doi]
- 2 3mW synthesizable fractional-N PLL with a soft injection-locking techniqueWei Deng, Dongsheng Yang, Aravind Tharayil Narayanan, Kengo Nakata, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa. 1-3 [doi]
- 2.10 A 60GHz 28nm UTBB FD-SOI CMOS reconfigurable power amplifier with 21% PAE, 18.2dBm P1dB and 74mW PDCAurelien Larie, Eric Kerherve, Baudouin Martineau, Lionel Vogt, Didier Belot. 1-3 [doi]
- 16.8 1GHz GaN-MMIC monolithically integrated MEMS-based oscillatorsBichoy W. Bahr, Laura C. Popa, Dana Weinstein. 1-3 [doi]
- 11.6 A multi-channel neural-recording amplifier system with 90dB CMRR employing CMOS-inverter-based OTAs with CMFB through supply rails in 65nm CMOSKian Ann Ng, Yong Ping Xu. 1-3 [doi]
- 27.9 A 200kS/s 13.5b integrated-fluxgate differential-magnetic-to-digital converter with an oversampling compensation loop for contactless current sensingMahdi Kashmiri, Wilko J. Kindt, Frerik Witte, Robin Kearey, Daniel Carbonell. 1-3 [doi]
- 16.4 Energy-autonomous fever alarm armband integrating fully flexible solar cells, piezoelectric speaker, temperature detector, and 12V organic complementary FET circuitsHiroshi Fuketa, Masamune Hamamatsu, Tomoyuki Yokota, Wakako Yukita, Teruki Someya, Tsuyoshi Sekitani, Makoto Takamiya, Takao Someya, Takayasu Sakurai. 1-3 [doi]
- 17.6 1V 10Gb/s/pin single-ended transceiver with controllable active-inductor-based driver and adaptively calibrated cascade-DFE for post-LPDDR4 interfacesJunyoung Song, Hyun-Woo Lee, Jayoung Kim, Sewook Hwang, Chulwoo Kim. 1-3 [doi]
- 6.2 133Mpixel 60fps CMOS image sensor with 32-column shared high-speed column-parallel SAR ADCsRyohei Funatsu, Steven Huang, Takayuki Yamashita, Kevin Stevulak, Jeff Rysinski, David Estrada, Shi Yan, Takuji Soeno, Tomohiro Nakamura, Tetsuya Hayashida, Hiroshi Shimamoto, Barmak Mansoorian. 1-3 [doi]
- 27.1 A 3-Axis gyroscope for electronic stability control with continuous self-testGanesh K. Balachandran, Vladimir P. Petkov, Thomas Mayer, Thorsten Baislink. 1-3 [doi]
- 24.4 A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%Atsutake Kosuge, Shu Ishizuka, Marni Abe, Satoshi Ichikawa, Tadahiro Kuroda. 1-3 [doi]
- 21.8 A 16-ch patient-specific seizure onset and termination detection SoC with machine-learning and voltage-mode transcranial stimulationMuhammad Awais Bin Altaf, Chen Zhang, Jerald Yoo. 1-3 [doi]
- 2 4-phase time-based buck converter consuming 3μA/MHz quiescent current in 65nm CMOSSeong Joong Kim, Romesh Kumar Nandwana, Qadeer Ahmad Khan, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu. 1-3 [doi]
- 6.8 A pen-pressure-sensitive capacitive touch system using electrically coupled resonance penChangbyung Park, Sungsoo Park, Kiduk Kim, Sang-Hui Park, Juwan Park, Yunhee Huh, Byunghoon Kang, Gyu-Hyeong Cho. 1-3 [doi]
- 14.6 An all-digital power-delivery monitor for analysis of a 28nm dual-core ARM Cortex-A57 clusterPaul N. Whatmough, Shidhartha Das, Zacharias Hadjilambrou, David M. Bull. 1-3 [doi]
- 11.8 Integrated ultrasonic system for measuring body-fat compositionHao-Yen Tang, Yipeng Lu, Stephanie Fung, David A. Horsley, Bernhard E. Boser. 1-3 [doi]
- 10.1 A 6Gb/s 6pJ/b 5mm-distance non-contact interface for modular smartphones using two-fold transmission-line coupler and EMC-qualified pulse transceiverAtsutake Kosuge, Shu Ishizuka, Junichiro Kadamoto, Tadahiro Kuroda. 1-3 [doi]
- 18.4 A matrix-multiplying ADC implementing a machine-learning classifier directly with data conversionJintao Zhang, Zhuo Wang, Naveen Verma. 1-3 [doi]
- 15.2 A 4.5mW CT self-coupled ΔΣ modulator with 2.2MHz BW and 90.4dB SNDR using residual ELD compensationChen-Yen Ho, Cong Liu, Chi-Lun Lo, Hung-Chieh Tsai, Tze-Chien Wang, Yu-Hsin Lin. 1-3 [doi]
- 26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOSBa-Ro-Saim Sung, Dong-Shin Jo, Il-Hoon Jang, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu. 1-3 [doi]
- 4.4 Energy-efficient microserver based on a 12-core 1.8GHz 188K-CoreMark 28nm bulk CMOS 64b SoC for big-data applications with 159GB/S/L memory bandwidth system densityRonald P. Luijten, Dae Pham, Rolf Clauberg, Matteo Cossale, Huy N. Nguyen, Mihir Pandya. 1-3 [doi]
- 6.7 A 2.3mW 11cm-range bootstrapped and correlated-double-sampling (BCDS) 3D touch sensor for mobile devicesLi Du, Yan Zhang, Frank Hsiao, Adrian Tang 0002, Yan Zhao, Yilei Li, Zuow-Zun Chen, Liting Huang, Mau-Chung Frank Chang. 1-3 [doi]
- 6.6 A 240Hz-reporting-rate mutual-capacitance touch-sensing analog front-end enabling multiple active/passive styluses with 41dB/32dB SNR for 0.5mm diameterMutsumi Hamaguchi, Michiaki Takeda, Masayuki Miyamoto. 1-3 [doi]
- 17.4 A 14nm 1.1Mb embedded DRAM macro with 1ns accessGregory Fredeman, Donald W. Plass, Abraham Mathews, Kenneth Reyer, Thomas J. Knips, Thomas Miller, Elizabeth Gerhard, Dinesh Kannambadi, Chris Paone, Dongho Lee, Daniel Rainey, Michael Sperling, Michael Whalen, Steven Burns. 1-3 [doi]
- 5.4 A 32nW bandgap reference voltage operational from 0.5V supply for ultra-low power systemsAatmesh Shrivastava, Kyle Craig, Nathan E. Roberts, David D. Wentzloff, Benton H. Calhoun. 1-3 [doi]
- 20.1 A light-load-efficient 11/1 switched-capacitor DC-DC converter with 94.7% efficiency while delivering 100mW at 3.3VHans Meyvaert, Gerard Villar Pique, Ravi Karadi, Henk Jan Bergveld, Michiel Steyaert. 1-3 [doi]
- 8.1 An 80nW retention 11.7pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in 65nm CMOS for WSN applicationsJames Myers, Anand Savanth, David Howard, Rohan Gaddh, Pranay Prabhat, David Flynn. 1-3 [doi]
- F2: Memory trends: From big data to wearable devicesJonathan Chang, Jonathan Chang, Leland Chang, Antoine Dupret, Chulwoo Kim, Fatih Hamzaoglu, Takefumi Yoshikawa. 1-2 [doi]
- F1: High-speed interleaved ADCsStephane Le Tuai, Borivoje Nikolic, Tetsuya Iizuka, Ichiro Fujimori. 1-2 [doi]
- F4: Building the Internet of Everything (IoE): Low-power techniques at the circuit and system levelsMarian Verhelst, Dennis Sylvester, Makoto Takamiya, Mike Clinton, Kathy Wilcox, Koichi Nose. 1-2 [doi]
- nd-order ΔΣ analogous bang-bang digital PLL with feed-forward delay-locked and phase-locked operations in 14nm FinFET technologyMinyoung Song, Taeik Kim, Jihyun F. Kim, Wooseok Kim, Sung Jin Kim, Hojin Park. 1-3 [doi]
- 27.3 A 3-axis open-loop gyroscope with demodulation phase error correctionChinwuba D. Ezekwe, Wolfram Geiger, Torsten Ohms. 1-3 [doi]
- 14.7 In-situ techniques for in-field sensing of NBTI degradation in an SRAM register fileTeng Yang, Doyun Kim, Peter R. Kinget, Mingoo Seok. 1-3 [doi]
- 14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dBZuow-Zun Chen, Yen-Hsiang Wang, Jaewook Shin, Yan Zhao, Seyed Arash Mirhaj, Yen-Cheng Kuan, Huan-Neng Chen, Chewnpu Jou, Ming-Hsien Tsai, Fu-Lung Hsueh, Mau-Chung Frank Chang. 1-3 [doi]
- 15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOSMartin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann. 1-3 [doi]
- 2.8 A broadband CMOS digital power amplifier with hybrid Class-G Doherty efficiency enhancementSong Hu, Shouhei Kousai, Hua Wang. 1-3 [doi]
- 2 active area for light energy harvestingHsuan-Ju Chen, Yi-Hsiang Wang, Peng-Chang Huang, Tai-Haur Kuo. 1-3 [doi]
- 2 130mW MMSE-nonbinary-LDPC iterative detector-decoder for 4×4 256-QAM MIMO in 65nm CMOSChia-Hsiang Chen, Wei Tang, Zhengya Zhang. 1-3 [doi]
- F5: Advanced RF CMOS transmitter techniquesPiet Wambacq, Stefano Pellerano, Sven Mattisson, Shouhei Kousai, Ali Afsahi, Taizo Yamawaki. 1-2 [doi]
- 9.7 An LTE SAW-less transmitter using 33% duty-cycle LO signals for harmonic suppressionYen-horng Chen, Neric Fong, Bing Xu, Caiyi Wang. 1-3 [doi]
- 19.1 Receiver with >20MHz bandwidth self-interference cancellation suitable for FDD, co-existence and full-duplex applicationsJin Zhou, Tsung-Hao Chuang, Tolga Dinc, Harish Krishnaswamy. 1-3 [doi]
- 8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasingSylvain Clerc, Mehdi Saligane, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Cyril Bottoni, David Bol, Julien De Vos, Dominique Zamora, Benjamin Coeffic, Dimitri Soussan, Damien Croain, Mehdi Naceur, Pierre Schamberger, Philippe Roche, Dennis Sylvester. 1-3 [doi]
- 3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOSParag Upadhyaya, Jafar Savoj, Fu-Tai An, Ade Bekele, Anup Jose, Bruce Xu, Daniel Wu, Didem Turker, Hesam Aslanzadeh, Hiva Hedayati, Jay Im, Siok-Wei Lim, Stanley Chen, Toan Pham, Yohan Frans, Ken Chang. 1-3 [doi]
- 12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive controlYi-Ping Su, Chiun-He Lin, Shen-Yu Peng, Ru-Yu Huang, Te-Fu Yang, Shin-Hao Chen, Ting-Jung Lo, Ke-Homg Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai. 1-3 [doi]
- 15.5 A 0.6V 1.17ps PVT-tolerant and synthesizable time-to-digital converter using stochastic phase interpolation with 16× spatial redundancy in 14nm FinFET technologySung Jin Kim, Wooseok Kim, Minyoung Song, Jihyun Kim, Taeik Kim, Hojin Park. 1-3 [doi]
- 6.1 A 1/1.7-inch 20Mpixel Back-illuminated stacked CMOS image sensor for new imaging applicationsAtsushi Suzuki, Nobutaka Shimamura, Toshiki Kainuma, Naoki Kawazu, Chihiro Okada, Takumi Oka, Kensuke Koiso, Atsushi Masagaki, Yoichi Yagasaki, Shigeru Gonoi, Tatsuya Ichikawa, Masatoshi Mizuno, Tatsuya Sugioka, Takafumi Morikawa, Yoshiaki Inada, Hayato Wakabayashi. 1-3 [doi]
- 20.8 A 500nW batteryless integrated electrostatic energy harvester interface based on a DC-DC converter with 60V maximum input voltage and operating from 1μW available power, including MPPT and cold startStefano Stanzione, Chris van Liempd, Misato Nabeto, Refet Firat Yazicioglu, Chris Van Hoof. 1-3 [doi]
- 13.7 A +10dBm 2.4GHz transmitter with sub-400pW leakage and 43.7% system efficiencyArun Paidimarri, Nathan Ickes, Anantha P. Chandrakasan. 1-3 [doi]
- 16.7 A 20V 8.4W 20MHz four-phase GaN DC-DC converter with fully on-chip dual-SR bootstrapped GaN FET driver achieving 4ns constant propagation delay and 1ns switching rise timeMinkyu Song, Lei Chen, Joseph Sankman, Stephen Terry, Dongsheng Ma. 1-3 [doi]
- 3.2 multi-standard 185fsrms 0.3-to-28Gb/s 40dB backplane signal conditioner with adaptive pattern-match 36-Tap DFE and data-rate-adjustment PLL in 28nm CMOSTakashi Kawamoto, Takayasu Norimatsu, Kenji Kogo, Fumio Yuki, Norio Nakajima, Masatoshi Tsuge, Tatsunori Usugi, Tomofumi Hokari, Hideki Koba, Takemasa Komori, Junya Nasu, Tsuneo Kawamata, Yuichi Ito, Seiichi Umai, Jun Kumazawa, Hiroaki Kurahashi, Takashi Muto, Takeo Yamashita, Masatoshi Hasegawa, Keiichi Higeta. 1-3 [doi]
- 14.3 15fJ/b static physically unclonable functions for secure chip identification with <2% native bit instability and 140× Inter/Intra PUF hamming distance separation in 65nmAnastacia B. Alvarez, Wenfeng Zhao, Massimo Alioto. 1-3 [doi]
- 2 SPDT switch with 3.3dB loss and 23.7dB isolation in 65nm bulk CMOSFanyi Meng, Kaixue Ma, Kiat Seng Yeo. 1-3 [doi]
- 15.8 90dB-SFDR 14b 500MS/S BiCMOS switched-current pipelined ADCManar El-Chammas, Xiaopeng Li, Shigenobu Kimura, Jesse Coulon, Jake Hu, David Smith, Paul E. Landman, Mark Weaver. 1-3 [doi]
- 2.9 A 29dBm 18.5% peak PAE mm-Wave digital power amplifier with dynamic load modulationKunal Datta, Hossein Hashemi. 1-3 [doi]
- 7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chipHyun-Jin Kim, Jeong-Don Lim, Jang-Woo Lee, Dae-Hoon Na, Joon-Ho Shin, Chae-Hoon Kim, Seungwoo Yu, Ji-Yeon Shin, Seon-Kyoo Lee, Devraj Rajagopal, Sang-Tae Kim, Kyeong-Tae Kang, Jeong-Joon Park, Yongjin Kwon, Min-Jae Lee, Sunghoon Kim, Seunghoon Shin, Hyung Gon Kim, Jin Tae Kim, Ki-Sung Kim, Han Sung Joo, Chan-Jin Park, Jae-Hwan Kim, Man-Joong Lee, Do-Kook Kim, Hyang-Ja Yang, Dae-Seok Byeon, Ki Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi. 1-3 [doi]
- 9.4 A 28nm CMOS digital fractional-N PLL with -245.5dB FOM and a frequency tripler for 802.11abgn/ac radioXiang Gao, Luns Tee, Wanghua Wu, Kun-Seok Lee, Arvind Anumula Paramanandam, Anuranjan Jha, Norman Liu, Edwin Chan, Li Lin. 1-3 [doi]
- 19.6 A 1.9mm-precision 20GS/S real-time sampling receiver using time-extension method for indoor localizationHong Gul Han, Byung-Gyu Yu, Tae-Wook Kim. 1-3 [doi]
- 11.3 A 160×120-pixel analog-counting single-photon imager with Sub-ns time-gating and self-referenced column-parallel A/D conversion for fluorescence lifetime imagingMatteo Perenzoni, Nicola Massari, Daniele Perenzoni, Leonardo Gasparini, David Stoppa. 1-3 [doi]
- 23.2 A 1920×1080 30fps 611 mW five-view depth-estimation processor for light-field applicationsHong-Hui Chen, Chao-Tsung Huang, Sih-Sian Wu, Chia-Liang Hung, Tsung-Chuan Ma, Liang-Gee Chen. 1-3 [doi]
- 17.7 A digital DLL with hybrid DCC using 2-step duty error extraction and 180° phase aligner for 2.67Gb/S/pin 16Gb 4-H stack DDR4 SDRAM with TSVsWon-Joo Yun, Indal Song, Hanki Jeoung, Hundai Choi, Seok Ho Lee, Jun-Bae Kim, Chi-Wook Kim, Jung Hwan Choi, Seong-Jin Jang, Joo-Sun Choi. 1-3 [doi]
- 7.5 A 3.3ns-access-time 71.2μW/MHz 1Mb embedded STT-MRAM using physically eliminated read-disturb scheme and normally-off memory architectureHiroki Noguchi, Kazutaka Ikegami, Keiichi Kushida, Keiko Abe, Shogo Itai, Satoshi Takaya, Naoharu Shimomura, Junichi Ito, Atsushi Kawasumi, Hiroyuki Hara, Shinobu Fujita. 1-3 [doi]
- 27.2 A1.2μg/√Hz-resolution 0.4μg-bias-instability MEMS silicon oscillating accelerometer with CMOS readout circuitXi Wang, Jian Zhao, Yang Zhao, Guo Ming Xia, An Ping Qiu, Yan Su, Yong Ping Xu. 1-3 [doi]
- 6.4 Single-shot 200Mfps 5×3-aperture compressive CMOS imagerFuta Mochizuki, Keiichiro Kagawa, Shin-ichiro Okihara, Min-Woong Seo, Bo Zhang, Taishi Takasawa, Keita Yasutomi, Shoji Kawahito. 1-3 [doi]
- 13.6 A 600μW Bluetooth low-energy front-end receiver in 0.13μm CMOS technologyAnith Selvakumar, Meysam Zargham, Antonio Liscidini. 1-3 [doi]
- 12.4 A 7.5W-output-power 96%-efficiency capacitor-free single-inductor 4-channel all-digital integrated DC-DC LED driver in a 0.18μm technologyStefan Dietrich, Sebastian Strache, Bastian Mohr, Jan Henning Mueller, Leo Rolff, Ralf Wunderlich, Stefan Heinen. 1-3 [doi]
- 20.3 A feedforward controlled on-chip switched-capacitor voltage regulator delivering 10W in 32nm SOI CMOSToke Meyer Andersen, Florian Krismer, Johann Walter Kolar, Thomas Toifl, Christian Menolfi, Lukas Kull, Thomas Morf, Marcel A. Kossel, Matthias Brandii, Pier Andrea Francese. 1-3 [doi]
- 22.5 A 4×20Gb/s WDM ring-based hybrid CMOS silicon photonics transceiverMichal Rakowski, Marianna Pantouvaki, Peter De Heyn, Peter Verheyen, Mark Ingels, Hongtao Chen, Jeroen De Coster, Guy Lepage, Brad Snyder, Kristin De Meyer, Michiel Steyaert, Nicola Pavarelli, Jun Su Lee, Peter O'Brien, Philippe P. Absil, Joris Van Campenhout. 1-3 [doi]
- 22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOSHao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding, Tom Baehr Jones, Marco Fiorentino, Michael Hochberg, Samuel Palermo, Patrick Yin Chiang. 1-3 [doi]
- 25.3 A VCO with implicit common-mode resonanceDavid Murphy, Hooman Darabi, Hao Wu. 1-3 [doi]
- 10.8 A wideband fractional-N ring PLL using a near-ground pre-distorted switched-capacitor loop filterChe-Fu Liang, Ping-Ying Wang. 1-3 [doi]
- 2 40nm multiband GSM/EDGE/HSPA+/TDSCDMA/LTE transceiverTheodore Georgantas, Kostis Vavelidis, Nikos Haralabidis, Stamatis Bouras, Iason Vassiliou, Charalampos Kapnistis, Yiannis Kokolakis, Hamed Peyravi, Gerasimos Theodoratos, Konstantinos S. Vryssas, Nikos Kanakaris, Christos Kokozidis, Spyros Kavvadias, Sofoklis Plevridis, Paul Mudge, Igor Elgorriaga, Aris Kyranas, Spyridon Liolis, Eleni Kytonaki, Giorgos Konstantopoulos, Pavlos Robogiannakis, Kosmas Tsilipanos, Michael Margaras, Panagiotis Betzios, Rahul Magoon, Nias Bouras, Maryam Rofougaran, Reza Rofougaran. 1-3 [doi]
- 13.1 A 227pJ/b -83dBm 2.4GHz multi-channel OOK receiver adopting receiver-based FLLJae-Seung Lee, Joo-Myoung Kim, Jae-Sup Lee, Seok-Kyun Han, Sang-Gug Lee. 1-3 [doi]
- 1.2 The future of IC design innovationSehat Sutardja. 1-6 [doi]
- 24.2 Context-aware hierarchical information-sensing in a 6μW 90nm CMOS voice activity detectorKomail Badami, Steven Lauwereins, Wannes Meert, Marian Verhelst. 1-3 [doi]
- 1.1 Silicon technologies and solutions for the data-driven worldKinam Kim. 1-7 [doi]
- 25.6 A 70.5-to-85.5GHz 65nm phase-locked loop with passive scaling of loop filterZhiqiang Huang, Howard Cam Luong, Baoyong Chi, Zhihua Wang, Haikun Jia. 1-3 [doi]
- 16.6 Double-side CMOS-CNT biosensor array with padless structure for simple bare-die measurements in a medical environmentJinhong Ahn, Jeaheung Lim, Seok-Hyang Kim, Jun-Yeon Yun, Changhyun Kim, Sang Hoon Hong, Myoung Jin Lee, Youngjune Park. 1-3 [doi]
- 15.6 12b 250MS/S pipelined ADC with virtual ground reference buffersHyun H. Boo, Duane S. Boning, Hae-Seung Lee. 1-3 [doi]
- 13.8 A 5.8GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering techniqueAtsushi Shirane, Haowei Tan, Yiming Fang, Taiki Ibe, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu. 1-3 [doi]
- 7.7 Enterprise-grade 6x fast read and 5x highly reliable SSD with TLC NAND-flash memory for big-data storageTsukasa Tokutomi, Masafumi Doi, Shogo Hachiya, Atsuro Kobayashi, Shuhei Tanakamaru, Ken Takeuchi. 1-3 [doi]
- 23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniquesHugh Mair, Gordon Gammie, Alice Wang, Sumanth Gururajarao, Ichiro Lin, HsinChen Chen, Wuan Kuo, Anand Rajagopalan, Wei-Zheng Ge, Rolf Lagerquist, Syed Rahman, C. J. Chung, Simon Wang, Lee-Kee Wong, Yi-Chang Zhuang, Kent Li, Jidong Wang, Minh Chau, Yijing Liu, Daniel Dia, Mark Peng, Uming Ko. 1-3 [doi]
- 5.2 A 110dB SNR ADC with ±30V input common-mode range and 8μV Offset for current sensing applicationsLong Xu, Burak Gonen, Qinwen Fan, Johan H. Huijsing, Kofi A. A. Makinwa. 1-3 [doi]
- 26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOSJan Mulder, Davide Vecchi, Yi Ke, Stefano Bozzola, Mark Core, Nitz Saputra, Qiongna Zhang, Jeff Riley, Han Yan, Mattia Introini, Sijia Wang, Christopher M. Ward, Jan R. Westra, Jiansong Wan, Klaas Bult. 1-3 [doi]
- EP3: Innovating on the tapeout treadmillJack Kenney, Frank O'Mahony, Jack Kenney. 1 [doi]
- 3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOSAyman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Keytaek Lee, Sebastian Hoyos, Samuel Palermo. 1-3 [doi]
- 18.1 A 2.71nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applicationsInjoon Hong, Kyeongryeol Bong, Dongjoo Shin, Seongwook Park, KyuHo Lee, Youchang Kim, Hoi-Jun Yoo. 1-3 [doi]
- 22.7 4×25.78Gb/s retimer ICs for optical links in 0.13μm SiGe BiCMOSTakayuki Shibasaki, Yukito Tsunoda, Hideki Oku, Satoshi Ide, Toshihiko Mori, Yoichi Koyanagi, Kazuhiro Tanaka, Tomohiro Ishihara, Hirotaka Tamura. 1-3 [doi]
- 2 1.5°C (3σ) 0.9kS/s thermal-diffusivity temperature sensor with VCO-based readoutRui Quan, Ugur Sonmez, Fabio Sebastiano, Kofi A. A. Makinwa. 1-3 [doi]
- 11.2 A 10.8ps-time-resolution 256×512 image sensor with 2-Tap true-CDS lock-in pixels for fluorescence lifetime imagingMin-Woong Seo, Keiichiro Kagawa, Keita Yasutomi, Taishi Takasawa, Yoshimasa Kawata, Nobukazu Teranishi, Zhuo Li, Izhal Abdul Halin, Shoji Kawahito. 1-3 [doi]
- 17.3 A 28nm 256kb 6T-SRAM with 280mV improvement in VMIN using a dual-split-control assist schemeMeng-Fan Chang, Chien-Fu Chen, Ting-Hao Chang, Chi-Chang Shuai, Yen-Yao Wang, Hiroyuki Yamauchi. 1-3 [doi]
- 10.9 A 13.1-to-28GHz fractional-N PLL in 32nm SOI CMOS with a ΔΣ noise-cancellation schemeMark A. Ferriss, Bodhisatwa Sadhu, Alexander Rylyakov, Herschel A. Ainspan, Daniel J. Friedman. 1-3 [doi]
- 2.1 A highly linear inductorless wideband receiver with phase- and thermal-noise cancellationHao Wu, Mohyee Mikhemar, David Murphy, Hooman Darabi, Mau-Chung Frank Chang. 1-3 [doi]
- 26.5 A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOSChi-Hang Chan, Yan Zhu 0001, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 1-3 [doi]
- 26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement techniqueHyeok-Ki Hong, Hyun-Wook Kang, Dong-Shin Jo, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu. 1-3 [doi]
- 5.1 A 60V auto-zero and chopper operational amplifier with 800kHz interleaved clocks and input bias-current trimmingYoshinori Kusuda. 1-3 [doi]
- 15.4 A 0.8V 10b 80kS/s SAR ADC with duty-cycled reference generationMaoqiang Liu, Pieter Harpe, Rainier van Dommele, Arthur H. M. van Roermund. 1-3 [doi]
- 3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOSJihwan Kim, Ajay Balankutty, Amr Elshazly, Yan-Yu Huang, Hang Song, Kai Yu, Frank O'Mahony. 1-3 [doi]
- 22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/sMarco Cignoli, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto. 1-3 [doi]
- 12.5 An error-based controlled single-inductor 10-output DC-DC buck converter with high efficiency at light load using adaptive pulse modulationMin-Yong Jung, Sang-Hui Park, Jun-Suk Bang, Dong-Chul Park, Se-un Shin, Gyu-Hyeong Cho. 1-3 [doi]
- 5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCsJunghyup Lee, Pyoungwon Park, SeongHwan Cho, Minkyu Je. 1-3 [doi]
- 21.4 A microfluidic-CMOS platform with 3D capacitive sensor and fully integrated transceiver IC for palmtop dielectric spectroscopyMehran Bakhshiani, Michael A. Suster, Pedram Mohseni. 1-3 [doi]
- 8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm processVipul Kumar Singhal, Vinod Menezes, Srinivasa Chakravarthy, Mahesh Mehendale. 1-3 [doi]
- 25.7 A 2.4GHz 4mW inductorless RF synthesizerLong Kong, Behzad Razavi. 1-3 [doi]
- 27.6 A 0.7pF-to-10nF fully digital capacitance-to-digital converter using iterative delay-chain dischargeWanyeong Jung, Seokhyeon Jeong, Sechang Oh, Dennis Sylvester, David Blaauw. 1-3 [doi]
- 9.2 A single-chip HSPA transceiver with fully integrated 3G CMOS power amplifiersJose Moreira, Stephan Leuschner, Nenad Stevanovic, Harald Pretl, Peter Pfann, Ronald Thuringer, Martin Kastner, Christian Proll, Andreas Schwarz, Florian Mrugalla, Jimena Saporiti, Umut Basaran, Andreas Langer, Tobias D. Werth, Timo Gossmann, Boris Kapfelsperger, Johann Pletzer. 1-3 [doi]
- 2 quasi-current-mode hysteretic buck DC-DC converter with 3μs load transient response in 0.35μm BCDMOSSang-Han Lee, Jun-Suk Bang, Kye-Seok Yoon, Sung-Wan Hong, Chang-Sik Shin, Min-Yong Jung, Gyu-Hyeong Cho. 1-3 [doi]
- 22.8 A 24-to-35Gb/s x4 VCSEL driver IC with multi-rate referenceless CDR in 0.13um SiGe BiCMOSYukito Tsunoda, Takayuki Shibasaki, Satoshi Ide, Toshihiko Mori, Yoichi Koyanagi, Kazuhiro Tanaka, Tomohiro Ishihara, Hirotaka Tamura. 1-3 [doi]
- 12.8 Wireless power transfer system using primary equalizer for coupling- and load-range extension in bio-implant applicationsXing Li, Chi-Ying Tsui, Wing-Hung Ki. 1-3 [doi]
- 13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching networkTomohiro Sano, Masakazu Mizokami, Hiroaki Matsui, Keisuke Ueda, Kenichi Shibata, Kenji Toyota, Tatsuhito Saitou, Hisayasu Sato, Koichi Yahagi, Yoshihiro Hayashi. 1-3 [doi]
- 19.5 An HCI-healing 60GHz CMOS transceiverRui Wu, Seitaro Kawai, Yuuki Seo, Kento Kimura, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa. 1-3 [doi]
- 2 CCIA with an orthogonal frequency chopping techniqueYi-Lin Tsai, Feng-Wen Lee, Tzu-Ying Chen, Tsung-Hsien Lin. 1-3 [doi]
- 10.4 A 5.8Gb/s adaptive integrating duobinary-based DFE receiver for multi-drop memory interfaceHyun-Wook Lim, Sung-Won Choi, Sang Kyu Lee, Chang-Hoon Baek, Jae-Youl Lee, Gyoo-Cheol Hwang, Bai-Sun Kong, Young-Hyun Jun. 1-3 [doi]
- 18.5 A configurable 12-to-237KS/s 12.8mW sparse-approximation engine for mobile ExG data aggregationFengbo Ren, Dejan Markovic. 1-3 [doi]
- 25.8 A 2.4GHz VCO with FOM of 190dBc/Hz at 10kHz-to-2MHz offset frequencies in 0.13μm CMOS using an ISF manipulation techniqueAli Mostajeran, Mehrdad Sharif Bakhtiar, Ehsan Afshari. 1-3 [doi]
- 5.6 A 0.13μm fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic rangeSaad Bin Nasir, Samantak Gangopadhyay, Arijit Raychowdhury. 1-3 [doi]
- 13.5 A -97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOSCamilo Salazar, Andreas Kaiser, Andreia Cathelin, Jan Rabaey. 1-3 [doi]
- 22.2 A 25Gb/s hybrid integrated silicon photonic transceiver in 28nm CMOS and SOIYanfei Chen, Masaya Kibune, Asako Toda, Akinori Hayakawa, Tomoyuki Akiyama, Shigeaki Sekiguchi, Hiroji Ebe, Nobuhiro Imaizumi, Tomoyuki Akahoshi, Suguru Akiyama, Shinsuke Tanaka, Takasi Simoyama, Ken Morito, Takuji Yamamoto, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura. 1-3 [doi]
- ES2: Brain-machine interfaces: Integrated circuits talking to neuronsFirat Yazicioglu, Peng Cong, Shahriar Mirabbasi, Peng Cong, Shahriar Mirabbasi. 1 [doi]
- 4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applicationsSeongwook Park, Kyeongryeol Bong, Dongjoo Shin, Jinmook Lee, Sungpill Choi, Hoi-Jun Yoo. 1-3 [doi]
- 13.2 A 3.7mW-RX 4.4mW-TX fully integrated Bluetooth Low-Energy/IEEE802.15.4/proprietary SoC with an ADPLL-based fast frequency offset compensation in 40nm CMOSYao-Hong Liu, Christian Bachmann, Xiaoyan Wang, Yan Zhang, Ao Ba, Benjamin Busze, Ming Ding, Pieter Harpe, Gert-Jan van Schaik, Georgios N. Selimis, Hans Giesen, Jordy Gloudemans, Adnane Sbai, Li Huang, Hiromu Kato, Guido Dolmans, Kathleen Philips, Harmke de Groot. 1-3 [doi]
- F6: I/O design at 25Gb/s and beyond: Enabling the future communication infrastructure for big dataKen Chang, Frank O'Mahony, Elad Alon, Hyeon-Min Bae, Nicola Da Dalt, Eric Fluhr, Frank O'Mahony. 1-2 [doi]
- 16.2 A large-area image sensing and detection system based on embedded thin-film classifiersWarren Rieutort-Louis, Tiffany Moy, Zhuo Wang, Sigurd Wagner, James C. Sturm, Naveen Verma. 1-3 [doi]
- 21.2 A 3nW signal-acquisition IC integrating an amplifier with 2.1 NEF and a 1.5fJ/conv-step ADCPieter Harpe, Hao Gao, Rainier van Dommele, Eugenio Cantatore, Arthur H. M. van Roermund. 1-3 [doi]
- 20.5 A 2-/3-phase fully integrated switched-capacitor DC-DC converter in bulk CMOS for energy-efficient digital circuits with 14% efficiency improvementJunmin Jiang, Yan Lu, Cheng Huang, Wing-Hung Ki, Philip K. T. Mok. 1-3 [doi]
- 4.3 Fine-grained adaptive power management of the SPARC M7 processorVenkatram Krishnaswamy, Jeffrey Brooks, Georgios Konstadinidis, Curtis McAllister, Ha Pham, Sebastian Turullols, Jinuk Luke Shin, Yifan YangGong, Haowei Zhang. 1-3 [doi]
- 18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applicationsJun Tanabe, Toru Sano, Yutaka Yamada, Tomoki Watanabe, Mayu Okumura, Manabu Nishiyama, Tadakazu Nomura, Kazushige Oma, Nobuhiro Sato, Moriyasu Banno, Hiroo Hayashi, Takashi Miyamori. 1-3 [doi]
- 2.7 A hybrid supply modulator with 10dB ET operation dynamic range achieving a PAE of 42.6% at 27.0dBm PA output powerSeung-Chul Lee, Ji-Seon Paek, Jun-Hee Jung, Yong-Sik Youn, Sung-Jun Lee, Min-Soo Cho, Jae-Jol Han, Jung Hyun Choi, Yong-Whan Joo, Takahiro Nomiyama, Su Ho Lee, Il-Young Sohn, Thomas Byunghak Cho, Byeong-ha Park, Inyup Kang. 1-3 [doi]
- Session 1 overview: Plenary sessionAnantha Chandrakasan, Hoi-Jun Yoo. 6-7 [doi]
- Session 2 Overview: RF TX/RX design techniques: RF subcommitteeEhsan Afshari, Minoru Fujishima. 28-29 [doi]
- Session 3 overview: Ultra-high-speed wireline transceivers and energy-efficient links: Wireline subcommitteeKen Chang, Shunichi Kaeriyama. 50-51 [doi]
- Session 4 overview: Processors: High-performance digital subcommitteeAtsuki Inoue, Jinuk Luke Shin. 68-69 [doi]
- Session 5 overview: Analog techniques: Analog subcommitteeXicheng Jiang, Ed van Tuijl. 86-87 [doi]
- Session 6 overview: Image sensors and displays: IMMD subcommitteeYusuke Oike, Young-Sun Na. 108-109 [doi]
- Session 7 overview: Non-volatile memory solutions: Memory subcommitteeFatih Hamzaoglu, Takashi Kono. 126-127 [doi]
- Session 8 overview: Low-power digital techniques: Energy-efficient digitalVictor V. Zyuban, Peter Nilsson. 142-143 [doi]
- Session 9 overview: High-performance wireless: Wireless subcommitteeLi Lin, Chun-Huat Heng. 158-159 [doi]
- Session 10 overview: Advanced wireline techniques and PLLs: Wireline subcommitteeGerrit den Besten, Ajith Amerasekera. 174-175 [doi]
- Session 11 overview: Sensors and imagers for life sciences: IMMD subcommitteeSam Kavusi, Makoto Ikeda. 194-195 [doi]
- Session 12 overview: Inductor-based power conversion: Analog subcommitteeMakato Takamiya, Dragan Maksimovie. 212-213 [doi]
- Session 13 overview: Energy-efficient RF systems: RF & wireless subcommitteesAli Afsahi, Jan van Sinderen. 232-233 [doi]
- Session 14 overview: Digital PLLs and SoC building blocks: High-performance digital subcommitteeAnthony Hill, Hiroo Hayashi. 250-251 [doi]
- Session 15 overview: Data-converter techniques: Data converters subcommitteeSeung-Tak Ryu, Matt Straayer. 270-271 [doi]
- Session 16 overview: Emerging technologies enabling next-generation systems: Technology directions subcommitteeJan Genoe, Koichi Nose. 288-289 [doi]
- Session 17 overview: Embedded memory and DRAM I/O: Memory subcommitteeLeland Chang, Takefumi Yoshikawa. 308-309 [doi]
- Session 18 overview: SoCs for mobile vision, sensing, and communications: Energy-efficient digital subcommitteeMike Polley, Paul Liang. 324-325 [doi]
- Session 19 overview: Advanced wireless techniques: Wireless subcommitteeStefano Pellerano, Koji Takinami. 340-341 [doi]
- Session 20 overview: Energy harvesting and SC power conversion: Analog subcommitteeMakoto Nagata, Stefano Stanzione. 356-357 [doi]
- Session 21 overview: Innovative personalized biomédical systems: Technology directions subcommitteeDavid Ruffieux, Antoine Dupret. 378-379 [doi]
- Session 22 overview: High-speed optical links: Wireline subcommitteeAzita Emami, Hyeon-Min Bae. 398-399 [doi]
- Session 23 overview: Low-power SoCs: High-performance digital subcommitteeAndy Charnas, Youngmin Shin. 418-419 [doi]
- Session 24 overview: Secure, efficient circuits for IoT: Technology directions subcommitteeChris Nicol, Shinichiro Mutoh. 426-427 [doi]
- Session 25 overview: RF frequency generation from GHz to THz: RF subcommitteePayam Heydari, Taizo Yamawaki. 436-437 [doi]
- Session 26 overview: Nyquist-rate converters: Data converters subcommitteeHae-Seung Lee, Seng-Pan Li. 456-457 [doi]
- Session 27 overview: Physical sensors: Imagers, MEMS, medical and displays subcommitteeRalf Brederlow, Michiel A. P. Pertijs. 472-473 [doi]